LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 622

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
4. Description
5. Pin description
6. Register description
UM10237_4
User manual
5.1 Multiple CAP and MAT pins
The Timer/Counter is designed to count cycles of the peripheral clock (PCLK) or an
externally-supplied clock, and can optionally generate interrupts or perform other actions
at specified timer values, based on four match registers. It also includes four capture
inputs to trap the timer value when an input signal transitions, optionally generating an
interrupt.
Table 24–545
Table 545. Timer/Counter pin description
Software can select multiple pins for most of the CAP or MAT functions in the Pin Select
registers, which are described in
MAT output, all such pins are driven identically. When more than one pin is selected for a
CAP input, the pin with the lowest port number is used.
Each Timer/Counter contains the registers shown in
the data stored in used bits only; it does not include reserved bits content). More detailed
descriptions follow.
Pin
CAP0[1:0]
CAP1[1:0]
CAP2[1:0]
CAP3[1:0]
MAT0[1:0]
MAT1[2:0]
MAT2[3:0]
MAT3[3:0]
•
Free running timer.
Type
Input
Output
gives a brief summary of each of the Timer/Counter related pins.
Description
Capture Signals- A transition on a capture pin can be configured to load one
of the Capture Registers with the value in the Timer Counter and optionally
generate an interrupt. Capture functionality can be selected from a number
of pins. When more than one pin is selected for a Capture input on a single
TIMER0/1 channel, the pin with the lowest Port number is used
Timer/Counter block can select a capture signal as a clock source instead of
the PCLK derived clock. For more details see
Register (T[0/1/2/3]CTCR - 0xE000 4070, 0xE000 8070, 0xE007 0070,
0xE007 4070)” on page
External Match Output 0/1- When a match register 0/1 (MR3:0) equals the
timer counter (TC) this output can either toggle, go low, go high, or do
nothing. The External Match Register (EMR) controls the functionality of this
output. Match Output functionality can be selected on a number of pins in
parallel.
Rev. 04 — 26 August 2009
Section
9–3. When more than one pin is selected for a
625.
Table 24–546
Chapter 24: LPC24XX Timer0/1/2/3
Section 24–6.3 “Count Control
("Reset Value" refers to
UM10237
© NXP B.V. 2009. All rights reserved.
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