LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 637

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
4. Pin description
5. PWM base addresses
6. Register description
UM10237_4
User manual
Table 554. Set and reset inputs for PWM flip-flops
[1]
[2]
Table 25–555
Table 555. Pin summary
Table 556: Addresses for PWM 0 and 1
The PWM0 and PWM1 function adds new registers and registers bits as shown in
Table 25–557
PWM Channel
1
2
3
4
5
6
Pin
PWM0/1[1]
PWM0/1[2]
PWM0/1[3]
PWM0/1[4]
PWM0/1[5]
PWM0/1[6]
PCAP0[0]
PCAP1[1:0]
PWM
0
1
Identical to single edge mode in this case since Match 0 is the neighboring match register. Essentially,
PWM1 cannot be a double edged output.
It is generally not advantageous to use PWM channels 3 and 5 for double edge PWM outputs because it
would reduce the number of double edge PWM outputs that are possible. Using PWM 2, PWM4, and
PWM6 for double edge PWM outputs provides the most pairings.
gives a brief summary of each of PWM related pins.
below.
Type
Output
Output
Output
Output
Output
Output
Input
Base addresses
0xE001 4000
0xE001 8000
Single Edge PWM (PWMSELn = 0)
Set by
Match 0
Match 0
Match 0
Match 0
Match 0
Match 0
Rev. 04 — 26 August 2009
Description
Output from PWM channel 1.
Output from PWM channel 2.
Output from PWM channel 3.
Output from PWM channel 4.
Output from PWM channel 5.
Output from PWM channel 6.
Capture Inputs. A transition on a capture pin can be configured to load
the corresponding Capture register with the value of the Timer Counter
and optionally generate an interrupt. PWM0 brings out one capture
input, PWM1 brings out 2 capture inputs.
Chapter 25: LPC24XX Pulse Width Modulator PWM0/PWM1
Reset by
Match 1
Match 2
Match 3
Match 4
Match 5
Match 6
Double Edge PWM (PWMSELn = 1)
Set by
Match 0
Match 1
Match 2
Match 3
Match 4
Match 5
[1]
[2]
[2]
UM10237
© NXP B.V. 2009. All rights reserved.
Reset by
Match 1
Match 2
Match 3
Match 4
Match 5
Match 6
[1]
[2]
[2]
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