LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 677

IC ARM7 MCU FLASH 512K 208TFBGA

LPC2468FET208,551

Manufacturer Part Number
LPC2468FET208,551
Description
IC ARM7 MCU FLASH 512K 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2468FET208,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4262
935283234551
LPC2468FET208-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2468FET208,551
Manufacturer:
NXP
Quantity:
6 174
Part Number:
LPC2468FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
UM10237_4
User manual
5.1.1 Criterion for Valid User Code
5.1 Memory map after any reset
When ISP mode is entered after a power on reset, the IRC and PLL are used to generate
CCLK of 14.748 MHz. This may not be the case when ISP is invoked by the user
application (see
The Flash portion of the boot block is 8 kB in size and resides in the top portion (starting
from 0x0007 E000) of the on-chip Flash memory. After any reset the entire boot block is
also mapped to the top of the on-chip memory space i.e. the boot block is also visible in
the memory region starting from the address 0x7FFF E000. The Flash boot loader is
designed to run from this memory area, but both the ISP and IAP software use parts of the
on-chip RAM. The RAM usage is described later in this chapter. The interrupt vectors
residing in the boot block of the on-chip Flash memory also become active after reset, i.e.,
the bottom 64 bytes of the boot block are also visible in the memory region starting from
the address 0x0000 0000. The reset vector contains a jump instruction to the entry point
of the flash boot loader software.
Criterion for valid user code: The reserved ARM interrupt vector location (0x0000 0014)
should contain the 2’s complement of the check-sum of the remaining interrupt vectors.
This causes the checksum of all of the vectors together to be 0. The boot loader code
disables the overlaying of the interrupt vectors from the boot block, then checksums the
interrupt vectors in sector 0 of the Flash. If the signatures match then the execution
control is transferred to the user code by loading the program counter with 0x0000 0000.
Hence the user Flash reset vector should contain a jump instruction to the entry point of
the user application code.
Fig 138. Map of lower memory after reset
2.0 GB - 8 kB
0.0 GB
2.0 GB
Section 30–10.8 “Reinvoke ISP” on page
Rev. 04 — 26 August 2009
Chapter 30: LPC24XX Flash memory programming firmware
(RE-MAPPED FROM TOP OF FLASH MEMORY)
(BOOT BLOCK INTERRUPT VECTORS)
8 kB BOOT BLOCK RE-MAPPED TO
ACTIVE INTERRUPT VECTORS
HIGHER ADDRESS RANGE
ON-CHIP FLASH MEMORY
FROM THE BOOT BLOCK
8 kB BOOT BLOCK
695).
0x7FFF FFFF
0x7FFF E000
0x0007 FFFF
0x0007 E000
0x0000 0000
UM10237
© NXP B.V. 2009. All rights reserved.
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