LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 701

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
6. ISP commands
UM10237_4
User manual
6.1 Unlock <Unlock code>
6.2 Set Baud Rate <Baud Rate> <stop bit>
The following commands are accepted by the ISP command handler. Detailed status
codes are supported for each command. The command handler sends the return code
INVALID_COMMAND when an undefined command is received. Commands and return
codes are in ASCII format.
CMD_SUCCESS is sent by ISP command handler only when received ISP command has
been completely executed and the new ISP command can be given by the host.
Exceptions from this rule are "Set Baud Rate", "Write to RAM", "Read Memory", and "Go"
commands.
Table 630. ISP command summary
Table 631. ISP Unlock command
Table 632. ISP Set Baud Rate command
ISP Command
Unlock
Set Baud Rate
Echo
Write to RAM
Read Memory
Go
Read Part ID
Read Boot code version K
Compare
Command
Input
Return Code
Description
Example
Command
Input
U
Unlock code: 23130
CMD_SUCCESS |
INVALID_CODE |
PARAM_ERROR
This command is used to unlock the Go command.
"U 23130<CR><LF>" unlocks the Go command.
B
Baud Rate: 9600 | 19200 | 38400 | 57600 | 115200 | 230400
Stop bit: 1 | 2
Rev. 04 — 26 August 2009
Usage
U <Unlock Code>
B <Baud Rate> <stop bit>
A <setting>
W <start address> <number of bytes>
R <address> <number of bytes>
G <address> <Mode>
J
M <address1> <address2> <number of bytes>
Chapter 31: LPC24XX On-chip bootloader for flashless parts
10
UM10237
© NXP B.V. 2009. All rights reserved.
Described in
Table 31–631
Table 31–632
Table 31–634
Table 31–635
Table 31–636
Table 31–637
Table 31–638
Table 31–640
Table 31–641
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