LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 763

IC ARM7 MCU FLASH 512K 208TFBGA

LPC2468FET208,551

Manufacturer Part Number
LPC2468FET208,551
Description
IC ARM7 MCU FLASH 512K 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2468FET208,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4262
935283234551
LPC2468FET208-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2468FET208,551
Manufacturer:
NXP
Quantity:
6 174
Part Number:
LPC2468FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 117. Interrupt sources bit allocation table . . . . . . . . 118
Table 118. LPC2400 pin configurations overview . . . . . .120
Table 119. LPC2458 pin allocation table . . . . . . . . . . . . .121
Table 120.Pin description . . . . . . . . . . . . . . . . . . . . . . . .124
Table 121.LPC2420/60/68 pin allocation table . . . . . . . .137
Table 122.LPC2420/60/68 pin description . . . . . . . . . . .140
Table 123.LPC2470/78 pin allocation table . . . . . . . . . .155
Table 124.LPC2470/78 pin description . . . . . . . . . . . . .158
Table 125.Boot control on pins P3[15]/D15 and
Table 126.LPC2400 PINSEL register use . . . . . . . . . . . .177
Table 127.Pin function select register bits . . . . . . . . . . . .178
Table 128.Pin Mode Select register bits . . . . . . . . . . . . .178
Table 129.Summary of pin connect block registers. . . . .178
Table 130.Pin function select register 0 (PINSEL0 - address
Table 131.Pin function select register 1 (PINSEL1 - address
Table 132.Pin function select register 2 (PINSEL2 - address
Table 133.Pin function select register 3 (PINSEL3 - address
Table 134.LPC2458 pin function select register 4 (PINSEL4
Table 135.LPC2420/60/68/70/78 pin function select register
Table 136.LPC2458 pin function select register 5 (PINSEL5
Table 137.LPC2420/60/68/70/78 pin function select register
Table 138.Pin function select register 6 (PINSEL6 - address
Table 139.LPC2458 pin function select register 7 (PINSEL7
Table 140.LPC24520/60/68/70/78 pin function select
Table 141.Pin function select register 8 (PINSEL8 - address
Table 142.LPC2458 pin function select register 9 (PINSEL9
Table 143.LPC2420/60/68/70/78 pin function select register
Table 144.Pin function select register 10 (PINSEL10 -
Table 145.Pin function select register 11 (PINSEL11 -
Table 146.Pin Mode select register 0 (PINMODE0 - address
Table 147.Pin Mode select register 1 (PINMODE1 - address
Table 148.Pin Mode select register 2 (PINMODE2 - address
Table 149.Pin Mode select register 3 (PINMODE3 - address
UM10237_4
User manual
Interrupt Controller . . . . . . . . . . . . . . . . . . . . . 116
P3/14]/D14 . . . . . . . . . . . . . . . . . . . . . . . . . . .175
0xE002 C000) bit description . . . . . . . . . . . . .179
0xE002 C004) bit description . . . . . . . . . . . . .180
0xE002 C008) bit description . . . . . . . . . . . . .181
0xE002 C00C) bit description . . . . . . . . . . . . .182
- address 0xE002 C010) bit description . . . . .183
4 (PINSEL4 - address 0xE002 C010) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .183
- address 0xE002 C014) bit description . . . . .185
5 (PINSEL5 - address 0xE002 C014) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .185
0xE002 C018) bit description . . . . . . . . . . . . .186
- address 0xE002 C01C) bit description . . . . .186
register 7 (PINSEL7 - address 0xE002 C01C) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .187
0xE002 C020) bit description . . . . . . . . . . . . .188
- address 0xE002 C024) bit description . . . . .188
9 (PINSEL9 - address 0xE002 C024) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .189
address 0xE002 C028) bit description . . . . . .190
address 0xE002 C02C) bit description . . . . . .190
0xE002 C040) bit description . . . . . . . . . . . . .190
0xE002 C044) bit description . . . . . . . . . . . . .191
0xE002 C048) bit description . . . . . . . . . . . . .191
Rev. 04 — 26 August 2009
Table 150.Pin Mode select register 4 (PINMODE4 - address
Table 151.Pin Mode select register 5 (PINMODE5 - address
Table 152.Pin Mode select register 6 (PINMODE6 - address
Table 153.Pin Mode select register 7 (PINMODE7 - address
Table 154.Pin Mode select register 8 (PINMODE8 - address
Table 155.Pin Mode select register 9 (PINMODE9 - address
Table 156.LPC2400 available port pins . . . . . . . . . . . . . 194
Table 157.GPIO pin description . . . . . . . . . . . . . . . . . . . 196
Table 158.Summary of GPIO registers (legacy APB
Table 159.Summary of GPIO registers (local bus accessible
Table 160.GPIO interrupt register map. . . . . . . . . . . . . . 199
Table 161.GPIO port Direction register (IO0DIR - address
Table 162.Fast GPIO port Direction register
Table 163.Fast GPIO port Direction control byte and
Table 164.GPIO port output Set register (IO0SET - address
Table 165.Fast GPIO port output Set register
Table 166.Fast GPIO port output Set byte and half-word
Table 167.GPIO port output Clear register (IO0CLR -
Table 168.Fast GPIO port output Clear register
Table 169.Fast GPIO port output Clear byte and half-word
Table 170.GPIO port Pin value register (IO0PIN - address
Table 171.Fast GPIO port Pin value register
Table 172.Fast GPIO port Pin value byte and half-word
Table 173.Fast GPIO port Mask register
Table 174.Fast GPIO port Mask byte and half-word
Table 175.GPIO overall Interrupt Status register (IOIntStatus
Chapter 36: LPC24XX Supplementary information
0xE002 C04C) bit description . . . . . . . . . . . . 191
0xE002 C050) bit description. . . . . . . . . . . . . 192
0xE002 C054) bit description. . . . . . . . . . . . . 192
0xE002 C058) bit description. . . . . . . . . . . . . 192
0xE002 C05C) bit description . . . . . . . . . . . . 192
0xE002 C060) bit description. . . . . . . . . . . . . 193
0xE002 C064) bit description. . . . . . . . . . . . . 193
accessible registers) . . . . . . . . . . . . . . . . . . . 197
registers - enhanced GPIO features) . . . . . . . 198
0xE002 8008 and IO1DIR - address
0xE002 8018) bit description . . . . . . . . . . . . . 199
(FIO[0/1/2/3/4]DIR - address
0x3FFF C0[0/2/4/6/8]0) bit description. . . . . . 199
half-word accessible register description . . . . 200
0xE002 8004 and IO1SET - address
0xE002 8014) bit description . . . . . . . . . . . . . 201
(FIO[0/1/2/3/4]SET - address
0x3FFF C0[1/3/5/7/9]8) bit description. . . . . . 201
accessible register description. . . . . . . . . . . . 201
address 0xE002 800C and IO1CLR - address
0xE002 801C) bit description. . . . . . . . . . . . . 202
(FIO[0/1/2/3/4]CLR - address
0x3FFF C0[1/3/5/7/9]C) bit description . . . . . 202
accessible register description. . . . . . . . . . . . 203
0xE002 8000 and IO1PIN - address
0xE002 8010) bit description . . . . . . . . . . . . . 204
(FIO[0/1/2/3/4]PIN - address
0x3FFF C0[1/3/5/7/9]4) bit description. . . . . . 204
accessible register description. . . . . . . . . . . . 205
(FIO[0/1/2/3/4]MASK - address
0x3FFF C0[1/3/5/7/9]0) bit description. . . . . . 206
accessible register description. . . . . . . . . . . . 206
UM10237
© NXP B.V. 2009. All rights reserved.
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