LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 775

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
5. Contents
Chapter 1: LPC24XX Introductory information
1
2
3
4
5
5.1
5.2
5.3
5.4
5.5
Chapter 2: LPC24XX Memory mapping
1
2
3
4
5
5.1
Chapter 3: LPC24XX System control
1
2
3
3.1
3.1.1
3.1.2
3.1.3
3.1.4
3.2
Chapter 4: LPC24XX Clocking and power control
1
2
2.1
2.2
2.2.1
2.2.2
2.3
3
3.1
3.1.1
3.2
UM10237_4
User manual
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
How to read this manual . . . . . . . . . . . . . . . . . . 3
LPC2400 features. . . . . . . . . . . . . . . . . . . . . . . . 4
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 6
How to read this chapter . . . . . . . . . . . . . . . . . 16
Memory map and peripheral addressing. . . . 16
Memory maps. . . . . . . . . . . . . . . . . . . . . . . . . . 18
APB peripheral addresses . . . . . . . . . . . . . . . 21
LPC2400 memory re-mapping and boot ROM 22
Summary of system control block functions 27
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 27
Register description . . . . . . . . . . . . . . . . . . . . 27
Summary of clocking and power control
functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Register description . . . . . . . . . . . . . . . . . . . . 45
LPC2458 ordering options . . . . . . . . . . . . . . . . 6
LPC2460 ordering options . . . . . . . . . . . . . . . . 6
LPC2468 ordering options . . . . . . . . . . . . . . . . 7
LPC2470 ordering options . . . . . . . . . . . . . . . . 7
LPC2478 ordering options . . . . . . . . . . . . . . . . 8
Memory map concepts and operating modes. 22
External interrupt inputs . . . . . . . . . . . . . . . . . 28
Register description . . . . . . . . . . . . . . . . . . . . 28
External Interrupt flag register (EXTINT -
0xE01F C140) . . . . . . . . . . . . . . . . . . . . . . . . 28
External Interrupt Mode register (EXTMODE -
0xE01F C148) . . . . . . . . . . . . . . . . . . . . . . . . 30
External Interrupt Polarity register (EXTPOLAR -
0xE01F C14C) . . . . . . . . . . . . . . . . . . . . . . . . 30
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Internal RC oscillator . . . . . . . . . . . . . . . . . . . 43
Main oscillator. . . . . . . . . . . . . . . . . . . . . . . . . 43
XTAL1 input . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Printed Circuit Board (PCB) layout guidelines 45
RTC oscillator . . . . . . . . . . . . . . . . . . . . . . . . . 45
Clock source selection multiplexer . . . . . . . . . 46
Clock Source Select register (CLKSRCSEL -
0xE01F C10C) . . . . . . . . . . . . . . . . . . . . . . . . 46
PLL (Phase Locked Loop) . . . . . . . . . . . . . . . 46
Rev. 04 — 26 August 2009
6
7
8
9
10
11
12
13
5.2
6
6.1
6.2
7
3.2.1
3.3
3.3.1
3.3.1.1
3.3.2
3.3.2.1
3.4
3.4.1
4
5
3.2.1
3.2.2
3.2.3
3.2.4
3.2.5
3.2.6
3.2.7
3.2.8
3.2.9
3.2.10
3.2.11
Chapter 36: LPC24XX Supplementary information
Architectural overview . . . . . . . . . . . . . . . . . . . 8
On-chip flash programming memory
(LPC2458/68/78). . . . . . . . . . . . . . . . . . . . . . . . . 9
On-chip SRAM . . . . . . . . . . . . . . . . . . . . . . . . . 10
LPC2458 block diagram . . . . . . . . . . . . . . . . . . 11
LPC2420/60 block diagram. . . . . . . . . . . . . . . 12
LPC2468 block diagram . . . . . . . . . . . . . . . . . 13
LPC2470 block diagram . . . . . . . . . . . . . . . . . 14
LPC2478 block diagram . . . . . . . . . . . . . . . . . 15
Memory mapping control . . . . . . . . . . . . . . . . 24
Prefetch abort and data abort exceptions . . 26
Brown-out detection . . . . . . . . . . . . . . . . . . . . 39
Code security vs. debugging . . . . . . . . . . . . . 40
Memory re-mapping. . . . . . . . . . . . . . . . . . . . 23
Memory Mapping Control Register (MEMMAP -
0xE01F C040) . . . . . . . . . . . . . . . . . . . . . . . . 24
Memory mapping control usage notes. . . . . . 24
Reset Source Identification Register (RSIR -
0xE01F C180) . . . . . . . . . . . . . . . . . . . . . . . . 33
AHB Configuration . . . . . . . . . . . . . . . . . . . . . 34
AHB Arbiter Configuration register 1 (AHBCFG1
- 0xE01F C188) . . . . . . . . . . . . . . . . . . . . . . . 34
Examples of AHB1 settings . . . . . . . . . . . . . . 36
AHB Arbiter Configuration register 2 (AHBCFG2 -
0xE01F C18C) . . . . . . . . . . . . . . . . . . . . . . . . 36
Examples of AHB2 settings . . . . . . . . . . . . . . 38
Other system controls and status flags . . . . . 38
System Controls and Status register (SCS -
0xE01F C1A0) . . . . . . . . . . . . . . . . . . . . . . . . 38
PLL operation. . . . . . . . . . . . . . . . . . . . . . . . . 47
PLL and startup/boot code interaction . . . . . . 48
PLL register description . . . . . . . . . . . . . . . . . 48
PLL Control register (PLLCON -
0xE01F C080) . . . . . . . . . . . . . . . . . . . . . . . . 48
PLL Configuration register (PLLCFG -
0xE01F C084) . . . . . . . . . . . . . . . . . . . . . . . . 49
PLL Status register (PLLSTAT -
0xE01F C088) . . . . . . . . . . . . . . . . . . . . . . . . 51
PLL Interrupt: PLOCK . . . . . . . . . . . . . . . . . . 52
PLL Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . 52
PLL Feed register (PLLFEED - 0xE01F C08C) 53
PLL and Power-down mode. . . . . . . . . . . . . . 53
PLL frequency calculation . . . . . . . . . . . . . . . 53
UM10237
© NXP B.V. 2009. All rights reserved.
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