LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 780

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
9.24
Chapter 12: LPC24XX LCD controller
1
2
3
4
4.1
4.2
4.3
4.4
4.5
4.6
5
5.1
5.1.1
5.1.2
5.1.3
6
6.1
6.1.1
6.1.2
6.2
6.3
6.4
6.5
6.5.1
6.5.2
6.5.3
6.5.4
6.5.5
6.5.6
6.6
6.7
6.8
6.9
6.10
6.10.1
6.10.2
6.11
6.11.1
6.11.2
6.11.2.1
6.11.2.2
6.12
7
7.1
7.2
7.2.1
Chapter 13: LPC24XX USB device controller
1
UM10237_4
User manual
How to read this chapter . . . . . . . . . . . . . . . . 281
Basic configuration . . . . . . . . . . . . . . . . . . . . 281
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 281
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 281
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 284
LCD controller functional description . . . . . 286
Register description . . . . . . . . . . . . . . . . . . . 303
Basic configuration . . . . . . . . . . . . . . . . . . . . 329
CRC calculation . . . . . . . . . . . . . . . . . . . . . . 279
Programmable parameters . . . . . . . . . . . . . . 282
Hardware cursor support . . . . . . . . . . . . . . . 282
Types of LCD panels supported . . . . . . . . . . 283
TFT panels . . . . . . . . . . . . . . . . . . . . . . . . . . 283
Color STN panels . . . . . . . . . . . . . . . . . . . . . 283
Monochrome STN panels . . . . . . . . . . . . . . . 284
Signal usage . . . . . . . . . . . . . . . . . . . . . . . . . 284
Signals used for single panel STN displays . 284
Signals used for dual panel STN displays . . 285
Signals used for TFT displays . . . . . . . . . . . 285
AHB interfaces . . . . . . . . . . . . . . . . . . . . . . . 287
AMBA AHB slave interface . . . . . . . . . . . . . . 287
AMBA AHB master interface . . . . . . . . . . . . 288
Dual DMA FIFOs and associated control
logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 288
Pixel serializer . . . . . . . . . . . . . . . . . . . . . . . 288
RAM palette . . . . . . . . . . . . . . . . . . . . . . . . . 292
Hardware cursor . . . . . . . . . . . . . . . . . . . . . . 294
Cursor operation . . . . . . . . . . . . . . . . . . . . . . 294
Cursor sizes . . . . . . . . . . . . . . . . . . . . . . . . . 295
Cursor movement . . . . . . . . . . . . . . . . . . . . . 295
Cursor XY positioning . . . . . . . . . . . . . . . . . . 295
Cursor clipping . . . . . . . . . . . . . . . . . . . . . . . 296
Cursor image format . . . . . . . . . . . . . . . . . . . 297
Gray scaler . . . . . . . . . . . . . . . . . . . . . . . . . . 299
Upper and lower panel formatters . . . . . . . . 299
Panel clock generator . . . . . . . . . . . . . . . . . . 300
Timing controller . . . . . . . . . . . . . . . . . . . . . . 300
STN and TFT data select . . . . . . . . . . . . . . . 300
STN displays . . . . . . . . . . . . . . . . . . . . . . . . 300
TFT displays . . . . . . . . . . . . . . . . . . . . . . . . . 300
Interrupt generation . . . . . . . . . . . . . . . . . . . 300
Master bus error interrupt . . . . . . . . . . . . . . . 301
Vertical compare interrupt. . . . . . . . . . . . . . . 301
Next base address update interrupt . . . . . . . 301
FIFO underflow interrupt. . . . . . . . . . . . . . . . 301
LCD power-up and power-down sequence . 302
LCD Configuration register (LCD_CFG, RW -
0xE01F C1B8) . . . . . . . . . . . . . . . . . . . . . . . 304
Horizontal Timing register (LCD_TIMH, RW -
0xFFE1 0000) . . . . . . . . . . . . . . . . . . . . . . . . 304
Horizontal timing restrictions. . . . . . . . . . . . . 305
Rev. 04 — 26 August 2009
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.15
7.16
7.17
7.18
7.19
7.20
7.21
7.22
7.23
7.24
7.25
7.26
8
9
2
Chapter 36: LPC24XX Supplementary information
LCD timing diagrams . . . . . . . . . . . . . . . . . . 323
LCD panel signal usage . . . . . . . . . . . . . . . . 325
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 329
Vertical Timing register (LCD_TIMV, RW - 0xFFE1
0004) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 306
Clock and Signal Polarity register (LCD_POL, RW
- 0xFFE1 0008) . . . . . . . . . . . . . . . . . . . . . . 307
Line End Control register (LCD_LE, RW - 0xFFE1
000C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 309
Upper Panel Frame Base Address register
(LCD_UPBASE, RW - 0xFFE1 0010) . . . . . 310
Lower Panel Frame Base Address register
(LCD_LPBASE, RW - 0xFFE1 0014). . . . . . 310
LCD Control register (LCD_CTRL, RW - 0xFFE1
0018) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311
Interrupt Mask register (LCD_INTMSK, RW -
0xFFE1 001C) . . . . . . . . . . . . . . . . . . . . . . . 313
Raw Interrupt Status register (LCD_INTRAW, RW
- 0xFFE1 0020) . . . . . . . . . . . . . . . . . . . . . . 314
Masked Interrupt Status register (LCD_INTSTAT,
RW - 0xFFE1 0024) . . . . . . . . . . . . . . . . . . . 315
Interrupt Clear register (LCD_INTCLR, RW -
0xFFE1 0028) . . . . . . . . . . . . . . . . . . . . . . . 315
Upper Panel Current Address register
(LCD_UPCURR, RW - 0xFFE1 002C). . . . . 316
Lower Panel Current Address register
(LCD_LPCURR, RW - 0xFFE1 0030) . . . . . 316
Color Palette registers (LCD_PAL, RW - 0xFFE1
0200 to 0xFFE1 03FC) . . . . . . . . . . . . . . . . 316
Cursor Image registers (CRSR_IMG, RW -
0xFFE1 0800 to 0xFFE1 0BFC) . . . . . . . . . 317
Cursor Control register (CRSR_CTRL, RW -
0xFFE1 0C00) . . . . . . . . . . . . . . . . . . . . . . . 318
Cursor Configuration register (CRSR_CFG, RW -
0xFFE1 0C04) . . . . . . . . . . . . . . . . . . . . . . . 318
Cursor Palette register 0 (CRSR_PAL0, RW -
0xFFE1 0C08) . . . . . . . . . . . . . . . . . . . . . . . 319
Cursor Palette register 1 (CRSR_PAL1, RW -
0xFFE1 0C0C) . . . . . . . . . . . . . . . . . . . . . . . 319
Cursor XY Position register (CRSR_XY, RW -
0xFFE1 0C10) . . . . . . . . . . . . . . . . . . . . . . . 320
Cursor Clip Position register (CRSR_CLIP, RW -
0xFFE1 0C14) . . . . . . . . . . . . . . . . . . . . . . . 320
Cursor Interrupt Mask register (CRSR_INTMSK,
RW - 0xFFE1 0C20). . . . . . . . . . . . . . . . . . . 321
Cursor Interrupt Clear register (CRSR_INTCLR,
RW - 0xFFE1 0C24). . . . . . . . . . . . . . . . . . . 321
Cursor Raw Interrupt Status register
(CRSR_INTRAW, RW - 0xFFE1 0C28) . . . . 322
Cursor Masked Interrupt Status register
(CRSR_INTSTAT, RW - 0xFFE1 0C2C) . . . 322
UM10237
© NXP B.V. 2009. All rights reserved.
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