LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 790

IC ARM7 MCU FLASH 512K 208TFBGA

LPC2468FET208,551

Manufacturer Part Number
LPC2468FET208,551
Description
IC ARM7 MCU FLASH 512K 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2468FET208,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4262
935283234551
LPC2468FET208-S

Available stocks

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Quantity
Price
Part Number:
LPC2468FET208,551
Manufacturer:
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Quantity:
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Part Number:
LPC2468FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
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NXP Semiconductors
3
4
5
5.1
5.1.1
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.2.7
5.2.8
5.2.9
5.2.10
6
7
8
9
9.1
9.2
9.3
9.4
9.5
Chapter 31: LPC24XX On-chip bootloader for flashless parts
1
2
3
4
4.1
4.2
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.2.6
4.2.7
4.2.8
4.2.9
4.2.10
5
6
Chapter 32: LPC24XX General Purpose DMA (GPDMA) controller
1
2
3
4
4.1
4.2
UM10237_4
User manual
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 676
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 676
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 676
Boot process flowchart . . . . . . . . . . . . . . . . . 680
Sector numbers . . . . . . . . . . . . . . . . . . . . . . . 681
Code Read Protection (CRP) . . . . . . . . . . . . 682
ISP commands . . . . . . . . . . . . . . . . . . . . . . . . 683
How to read this chapter . . . . . . . . . . . . . . . . 697
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 697
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 697
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 697
Boot process flowchart . . . . . . . . . . . . . . . . . 700
ISP commands . . . . . . . . . . . . . . . . . . . . . . . . 701
Basic configuration . . . . . . . . . . . . . . . . . . . . 711
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 711
Features of the GPDMA. . . . . . . . . . . . . . . . . 711
Functional overview . . . . . . . . . . . . . . . . . . . 712
Memory map after any reset. . . . . . . . . . . . . 677
Criterion for Valid User Code . . . . . . . . . . . . 677
Communication protocol . . . . . . . . . . . . . . . . 678
ISP command format . . . . . . . . . . . . . . . . . . 678
ISP response format . . . . . . . . . . . . . . . . . . . 678
ISP data format. . . . . . . . . . . . . . . . . . . . . . . 678
ISP flow control. . . . . . . . . . . . . . . . . . . . . . . 679
ISP command abort . . . . . . . . . . . . . . . . . . . 679
Interrupts during ISP. . . . . . . . . . . . . . . . . . . 679
Interrupts during IAP. . . . . . . . . . . . . . . . . . . 679
RAM used by ISP command handler . . . . . . 679
RAM used by IAP command handler . . . . . . 679
RAM used by RealMonitor . . . . . . . . . . . . . . 679
Unlock <Unlock code> . . . . . . . . . . . . . . . . . 684
Set Baud Rate <Baud Rate> <stop bit> . . . . 684
Echo <setting> . . . . . . . . . . . . . . . . . . . . . . . 685
Write to RAM <start address> <number of
bytes> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 685
Read Memory <address> <no. of bytes> . . . 685
Memory map after any reset. . . . . . . . . . . . . 698
Communication protocol . . . . . . . . . . . . . . . . 698
ISP command format . . . . . . . . . . . . . . . . . . 699
ISP response format . . . . . . . . . . . . . . . . . . . 699
ISP data format. . . . . . . . . . . . . . . . . . . . . . . 699
ISP flow control. . . . . . . . . . . . . . . . . . . . . . . 699
ISP command abort . . . . . . . . . . . . . . . . . . . 699
Interrupts during ISP. . . . . . . . . . . . . . . . . . . 699
Interrupts during IAP. . . . . . . . . . . . . . . . . . . 699
RAM used by ISP command handler . . . . . . 699
RAM used by IAP command handler . . . . . . 700
RAM used by RealMonitor . . . . . . . . . . . . . . 700
Memory regions accessible by the GPDMA . 712
GPDMA functional description . . . . . . . . . . . 712
Rev. 04 — 26 August 2009
9.6
9.7
9.8
9.9
9.10
9.11
9.12
9.13
9.14
10
10.1
10.2
10.3
10.4
10.5
10.6
10.7
10.8
10.9
11
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
7
7.1
7.2
7.3
7.4
7.5
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.2.6
4.2.7
Chapter 36: LPC24XX Supplementary information
IAP commands . . . . . . . . . . . . . . . . . . . . . . . 690
JTAG Flash programming interface . . . . . . 696
IAP commands . . . . . . . . . . . . . . . . . . . . . . . 706
Prepare sector(s) for write operation <start sector
number> <end sector number> . . . . . . . . . . 686
Copy RAM to Flash <Flash address> <RAM
address> <no of bytes> . . . . . . . . . . . . . . . . 687
Go <address> <mode> . . . . . . . . . . . . . . . . 687
Erase sector(s) <start sector number> <end
sector number> . . . . . . . . . . . . . . . . . . . . . . 688
Blank check sector(s) <sector number> <end
sector number> . . . . . . . . . . . . . . . . . . . . . . 688
Read Part Identification number . . . . . . . . . 688
Read Boot code version number . . . . . . . . . 689
Compare <address1> <address2>
<no of bytes> . . . . . . . . . . . . . . . . . . . . . . . . 689
ISP Return Codes . . . . . . . . . . . . . . . . . . . . 690
Prepare sector(s) for write operation . . . . . . 692
Copy RAM to Flash . . . . . . . . . . . . . . . . . . . 693
Erase Sector(s) . . . . . . . . . . . . . . . . . . . . . . 694
Blank check sector(s). . . . . . . . . . . . . . . . . . 694
Read Part Identification number . . . . . . . . . 694
Read Boot code version number . . . . . . . . . 695
Compare <address1> <address2>
<no of bytes> . . . . . . . . . . . . . . . . . . . . . . . . 695
Reinvoke ISP . . . . . . . . . . . . . . . . . . . . . . . . 695
IAP Status Codes. . . . . . . . . . . . . . . . . . . . . 696
Unlock <Unlock code> . . . . . . . . . . . . . . . . . 701
Set Baud Rate <Baud Rate> <stop bit>. . . . 701
Echo <setting> . . . . . . . . . . . . . . . . . . . . . . . 702
Write to RAM <start address>
<number of bytes> . . . . . . . . . . . . . . . . . . . . 702
Read Memory <address> <no. of bytes>. . . 703
Go <address> <mode> . . . . . . . . . . . . . . . . 704
Read Part Identification number . . . . . . . . . 704
Read Boot code version number . . . . . . . . . 704
Compare <address1> <address2>
<no of bytes> . . . . . . . . . . . . . . . . . . . . . . . . 705
ISP Return Codes . . . . . . . . . . . . . . . . . . . . 705
Read Part Identification number . . . . . . . . . 708
Read Boot code version number . . . . . . . . . 708
Compare <address1> <address2>
<no of bytes> . . . . . . . . . . . . . . . . . . . . . . . . 709
Reinvoke ISP . . . . . . . . . . . . . . . . . . . . . . . . 709
IAP Status Codes. . . . . . . . . . . . . . . . . . . . . 709
AHB Slave Interface. . . . . . . . . . . . . . . . . . . 713
Control Logic and Register Bank . . . . . . . . . 713
DMA Request and Response Interface . . . . 713
Channel Logic and Channel Register Bank . 714
Interrupt Request . . . . . . . . . . . . . . . . . . . . . 714
AHB Master Interface. . . . . . . . . . . . . . . . . . 714
Bus and transfer widths . . . . . . . . . . . . . . . . 714
UM10237
© NXP B.V. 2009. All rights reserved.
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