STM8S103F3P6 STMicroelectronics, STM8S103F3P6 Datasheet - Page 52

• Manufacturer Part Number: STM8S103F3P6
• Description: MCU 8BIT 8KB FLASH 20-TSSOP
• Manufacturer: STMicroelectronics
• Series: STM8Sr

Specifications of STM8S103F3P6

• Core Processor: STM8
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 640 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.95 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-TSSOP
• Processor Series: STM8S10x
• Core: STM8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 7
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWSTM8
• Development Tools By Supplier: STM8/128-MCKIT, STM8S-DISCOVERY, ST-LINK, STICE-SYS001, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• Featured Product: STM32 Cortex-M3 Companion Products
• For Use With: 497-10593 - KIT STARTER FOR STM8S207/8 SER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical characteristics
10.3.1
52/113
Symbol
(2)
value for T
(3)
t
t
V
V
V
(1)
minimum ooperating voltage (V
VDD
TEMP
IT+
IT-
HYS(BOR)
To calculate P
Τ
Reset is always generated after a t
Jmax
is given by the test limit. Above this value the product behavior is not guaranteed.
Jmax
VCAP external capacitor
Stabilization for the main regulator is achieved connecting an external capacitor C
V
the series inductance to less than 15 nH.
Parameter
V
V
Reset release delay
Power-on reset threshold
Brown-out reset threshold
Brown-out reset hysteresis
CAP
DD
DD
given in the previous table and the value for Θ
Dmax
rise time rate
fall time rate
pin. C
(T
Table 20: Operating conditions at power-up/power-down
A
EXT
), use the formula P
Functionality
not
guaranteed
in this area
is specified in the Operating conditions section. Care should be taken to limit
(1)
f
DD
CPU (MHz)
min) when the t
TEMP
16
12
8
4
0
Figure 9: f
delay. The application must ensure that V
DocID15441 Rev 6
Dmax
=(T
2.95
Conditions
V
TEMP
DD
Jmax
CPUmax
rising
Functionality guaranteed
delay has elapsed.
- T
@T A -40 to 125 °C
A
4.0
)/Θ
Supply voltage
STM8S103K3 STM8S103F3 STM8S103F2
versus V
JA
JA
given in
(see
5.0
Thermal characteristics
Min
DD
2
2
2.6
2.5
Thermal
5.5
Typ
2.7
2.65
70
characteristics.
DD
is still above the
Max
∞
∞
1.7
2.85
2.8
) with the
EXT
Unit
μs/V
ms
V
mV
to the