STM8S103F3P6 STMicroelectronics, STM8S103F3P6 Datasheet - Page 87
Manufacturer Part Number
MCU 8BIT 8KB FLASH 20-TSSOP
Specifications of STM8S103F3P6
I²C, IrDA, LIN, SPI, UART/USART
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
Program Memory Size
8KB (8K x 8)
Program Memory Type
640 x 8
1K x 8
Voltage - Supply (vcc/vdd)
2.95 V ~ 5.5 V
-40°C ~ 85°C
Package / Case
Data Bus Width
Data Ram Size
I2C, SPI, UART
Maximum Clock Frequency
Number Of Programmable I/os
Number Of Timers
Maximum Operating Temperature
+ 85 C
3rd Party Development Tools
Development Tools By Supplier
STM8/128-MCKIT, STM8S-DISCOVERY, ST-LINK, STICE-SYS001, STX-RLINK
Minimum Operating Temperature
- 40 C
10 bit, 5 Channel
STM32 Cortex-M3 Companion Products
For Use With
497-10593 - KIT STARTER FOR STM8S207/8 SER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
STM8S103K3 STM8S103F3 STM8S103F2
3. End point correlation line
Susceptibility tests are performed on a sample basis during product characterization.
Functional EMS (electromagnetic susceptibility)
While executing a simple application (toggling 2 LEDs through I/O ports), the product is
stressed by two electromagnetic events until a failure occurs (indicated by the LEDs).
A device reset allows normal operations to be resumed. The test results are given in the table
below based on the EMS levels and classes defined in application note AN1709 (EMC design
guide for STMicrocontrollers).
Designing hardened software to avoid noise problems
EMC characterization and optimization are performed at component level with a typical
application environment and simplified MCU software. It should be noted that good EMC
performance is highly dependent on the user application and the software in particular.
Therefore it is recommended that the user applies EMC software optimization and
prequalification tests in relation with the EMC level requested for his application.
point correlation line.
FESD: Functional electrostatic discharge (positive and negative) is applied on all pins of
the device until a functional disturbance occurs. This test conforms with the IEC 61000-4-2
FTB: A burst of fast transient voltage (positive and negative) is applied to V
through a 100 pF capacitor, until a functional disturbance occurs. This test conforms with
the IEC 61000-4-4 standard.
= Integral linearity error: maximum deviation between any actual transition and the end
= Total unadjusted error: maximum deviation between the actual and the ideal transfer
= Differential linearity error: maximum deviation between actual steps and the ideal
= Offset error: deviation between the first actual transition and the first ideal one.
= Gain error: deviation between the last ideal transition and the last actual one.
Figure 44: Typical application with ADC
DocID15441 Rev 6
± 1 µA