IC ENCORE MCU FLASH 2K 28SOIC

 

Z8F0213SJ005EG

Manufacturer Part NumberZ8F0213SJ005EG
DescriptionIC ENCORE MCU FLASH 2K 28SOIC
ManufacturerZilog
SeriesEncore!® XP®
Z8F0213SJ005EG datasheets

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Warranty: 60 days

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Specifications of Z8F0213SJ005EG

Core ProcessorZ8Core Size8-Bit
Speed5MHzConnectivityIrDA, UART/USART
PeripheralsBrown-out Detect/Reset, LED, POR, PWM, WDTNumber Of I /o24
Program Memory Size2KB (2K x 8)Program Memory TypeFLASH
Ram Size512 x 8Voltage - Supply (vcc/vdd)2.7 V ~ 3.6 V
Oscillator TypeInternalOperating Temperature-40°C ~ 105°C
Package / Case28-SOIC (7.5mm Width)Lead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Data Converters-
Other names269-4054
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®
Z8 Encore! XP
F0823 Series
Product Specification
109
0 = Send a 0 in the multiprocessor bit location of the data stream (data byte)
1 = Send a 1 in the multiprocessor bit location of the data stream (address byte)
DEPOL—Driver Enable Polarity
0 = DE signal is Active High
1 = DE signal is Active Low
BRGCTL—Baud Rate Control
This bit causes an alternate UART behavior depending on the value of the REN bit in the
UART Control 0 Register.
When the UART receiver is not enabled (REN=0), this bit determines whether the Baud
Rate Generator issues interrupts.
0 = Reads from the Baud Rate High and Low Byte registers return the BRG Reload Value.
1 = The Baud Rate Generator generates a receive interrupt when it counts down to 0.
Reads from the Baud Rate High and Low Byte registers return the current BRG count
value.
When the UART receiver is enabled (REN=1), this bit allows reads from the Baud Rate
Registers to return the BRG count value instead of the Reload Value.
0 = Reads from the Baud Rate High and Low Byte registers return the BRG Reload Value.
1 = Reads from the Baud Rate High and Low Byte registers return the current BRG count
value. Unlike the Timers, there is no mechanism to latch the Low Byte when the High
Byte is read.
RDAIRQ—Receive Data Interrupt Enable
0 = Received data and receiver errors generates an interrupt request to the Interrupt
Controller.
1 = Received data does not generate an interrupt request to the Interrupt Controller. Only
receiver errors generate an interrupt request.
IREN—Infrared Encoder/Decoder Enable
0 = Infrared Encoder/Decoder is disabled. UART operates normally.
1 = Infrared Encoder/Decoder is enabled. The UART transmits and receives data through
the Infrared Encoder/Decoder.
UART Address Compare Register
The UART Address Compare register stores the multi-node network address of the UART.
When the MPMD[1] bit of UART Control Register 0 is set, all incoming address bytes are
compared to the value stored in the Address Compare register. Receive interrupts and
RDA assertions only occur in the event of a match.
PS024314-0308
Universal Asynchronous Receiver/Transmitter