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- Integrated Circuits (ICs)/
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Z8F0213SJ005EG
Z8F0213SJ005EG | |
|---|---|
| Manufacturer Part Number | Z8F0213SJ005EG |
| Description | IC ENCORE MCU FLASH 2K 28SOIC |
| Manufacturer | Zilog |
| Series | Encore!® XP® |
| Z8F0213SJ005EG datasheets |
|
Availability: By request
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
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Specifications of Z8F0213SJ005EG | |||
|---|---|---|---|
| Core Processor | Z8 | Core Size | 8-Bit |
| Speed | 5MHz | Connectivity | IrDA, UART/USART |
| Peripherals | Brown-out Detect/Reset, LED, POR, PWM, WDT | Number Of I /o | 24 |
| Program Memory Size | 2KB (2K x 8) | Program Memory Type | FLASH |
| Ram Size | 512 x 8 | Voltage - Supply (vcc/vdd) | 2.7 V ~ 3.6 V |
| Oscillator Type | Internal | Operating Temperature | -40°C ~ 105°C |
| Package / Case | 28-SOIC (7.5mm Width) | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
| Eeprom Size | - | Data Converters | - |
| Other names | 269-4054 Z8F0213SJ005EG | ||
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PrevNext
On-Chip Debugger Commands
The host communicates to the OCD by sending OCD commands using the DBG interface.
During normal operation, only a subset of the OCD commands are available. In DEBUG
mode, all OCD commands become available unless the user code and control registers are
protected by programming the Flash Read Protect Option bit (
Protect Option bit prevents the code in memory from being read out of Z8 Encore! XP
F0823 Series products. When this option is enabled, several of the OCD commands are
disabled.
Table 99
mand is described in further detail in the bulleted list following this table.
page 162 also indicates those commands that operate when the device is not in DEBUG
mode (normal operation) and those commands that are disabled by programming the Flash
Read Protect Option bit.
Command
Debug Command
Byte
Read OCD Revision
Reserved
Read OCD Status Register
Read Runtime Counter
Write OCD Control Register
Read OCD Control Register
Write Program Counter
Read Program Counter
Write Register
Read Register
Write Program Memory
Read Program Memory
Write Data Memory
Read Data Memory
Read Program Memory CRC
Reserved
Step Instruction
PS024314-0308
on page 162 is a summary of the OCD commands. Each OCD com-
Enabled when
NOT in DEBUG
Disabled by Flash Read Protect
mode?
Option Bit
00H
Yes
01H
–
02H
Yes
03H
–
04H
Yes
05H
Yes
06H
–
07H
–
08H
–
Only writes of the Flash Memory Control
registers are allowed. Additionally, only
the Mass Erase command is allowed to
be written to the Flash Control register.
09H
–
0AH
–
0BH
–
0CH
–
0DH
–
0EH
–
0FH
–
10H
–
®
Z8 Encore! XP
F0823 Series
Product Specification
). The Flash Read
FRP
®
Table 99
on
–
–
–
–
Cannot clear DBGMODE bit.
–
Disabled.
Disabled.
Disabled.
Disabled.
Disabled.
Yes.
–
–
–
Disabled.
On-Chip Debugger
157
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