ST62T20CB3 STMicroelectronics, ST62T20CB3 Datasheet - Page 26

IC MCU 8BIT W/ADC 20-PDIP

ST62T20CB3

Manufacturer Part Number
ST62T20CB3
Description
IC MCU 8BIT W/ADC 20-PDIP
Manufacturer
STMicroelectronics
Series
ST6r
Datasheet

Specifications of ST62T20CB3

Core Processor
ST6
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, WDT
Number Of I /o
12
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ST62T2x
Core
ST6
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Development Tools By Supplier
ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
ST6208C/ST6209C/ST6210C/ST6220C
RESET (Cont’d)
5.3.4 Watchdog Reset
The MCU provides a Watchdog timer function in
order to be able to recover from software hang-
ups. If the Watchdog register is not refreshed be-
fore an end-of-count condition is reached, a
Watchdog reset is generated.
After a Watchdog reset, the MCU restarts in the
same way as if a Reset was generated by the RE-
SET pin.
Note: When a watchdog reset occurs, the RESET
pin is tied low for very short time period, to flag the
reset phase. This time is not long enough to reset
external circuits.
For more details refer to the Watchdog Timer
chapter.
5.3.5 LVD Reset
Two different RESET sequences caused by the in-
ternal LVD circuitry can be distinguished:
During an LVD reset, the RESET pin is pulled low
when V
edge).
For more details, refer to the LVD chapter.
Caution: Do not externally connect directly the
RESET pin to V
component in case of internal RESET (Watchdog
or LVD).
Figure 15. Simple External Reset Circuitry
26/104
1
Typical: R = 10K
Power-On RESET
Voltage Drop RESET
V
DD
DD
C = 10nF
<V
IT+
DD
(rising edge) or V
R
C
, this may cause damage to the
V
RESET
DD
R > 4.7 K
ST62xx
DD
<V
IT-
(falling
Figure 16. Reset Processing
YES
FROM RESET LOCATIONS
FETCH INSTRUCTION
INT LATCH CLEARED
ON ADDRESS BUS
NMI MODE FLAGS
IS RESET STILL
NMI MASK SET
(IF PRESENT)
PUT FFEh
FFEh/FFFh
INTERNAL
PRESENT?
LOAD PC
SELECT
RESET
RESET
CLOCK CYCLE
NO
DELAY
2048

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