STM32F101C6T6A STMicroelectronics, STM32F101C6T6A Datasheet
STM32F101C6T6A
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STM32F101C6T6A Summary of contents
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Low-density access line, ARM-based 32-bit MCU with Flash, 5 timers, ADC and 4 communication interfaces Features ■ Core: ARM 32-bit Cortex™-M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state ...
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Contents Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STM32F101x4, STM32F101x6 4 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Contents 7 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 8 Revision ...
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STM32F101x4, STM32F101x6 List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of tables Table 45. ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STM32F101x4, STM32F101x6 List of figures Figure 1. STM32F101xx Low-density access line block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of figures Figure 42. Recommended footprint Figure 43. LQFP64 P max vs 8/79 ( ...
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... This datasheet provides the ordering information and mechanical device characteristics of the STM32F101x4 and STM32F101x6 low-density access line microcontrollers. For more details on the whole STMicroelectronics STM32F101xx family, please refer to Full compatibility throughout the The Low-density STM32F101xx datasheet should be read in conjunction with the low-, medium- and high-density STM32F10xxx reference manual ...
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Description 2 Description The STM32F101x4 and STM32F101x6 Low-density access line family incorporates the high-performance ARM Cortex™-M3 32-bit RISC core operating MHz frequency, high-speed embedded memories (Flash memory Kbytes and SRAM ...
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STM32F101x4, STM32F101x6 2.1 Device overview Figure 1 shows the general block diagram of the device family. Table 2. Low-density STM32F101xx device features and peripheral counts Peripheral Flash - Kbytes SRAM - Kbytes General-purpose SPI USART 12-bit synchronized ...
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Description Figure 1. STM32F101xx Low-density access line block diagram TRACECLK TRACED[0: NJTRST JTDI JTCK/SWCLK JTMS/SWDIO JTDO as AF NRST VDDA VSSA 80AF PA[ 15:0] PB[ 15:0] PC[15:0] PD[3:0] MOSI,MISO, SCK,NSS as AF RX,TX, CTS, RTS, Smartcard as AF ...
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STM32F101x4, STM32F101x6 Figure 2. Clock tree OSC_OUT OSC_IN OSC32_IN OSC32_OUT MCO 1. When the HSI is used as a PLL clock input, the maximum system clock frequency that can be achieved is 36 MHz have an ADC conversion ...
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Description 2.2 Full compatibility throughout the family The STM32F101xx is a complete family whose members are fully pin-to-pin, software and feature compatible. In the reference manual, the STM32F101x4 and STM32F101x6 are referred to as low-density devices, the STM32F101x8 and STM32F101xB ...
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STM32F101x4, STM32F101x6 2.3 Overview ® 2.3.1 ARM Cortex™-M3 core with embedded Flash and SRAM The ARM Cortex™-M3 processor is the latest generation of ARM processors for embedded systems. It has been developed to provide a low-cost platform that meets the ...
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Description 2.3.6 External interrupt/event controller (EXTI) The external interrupt/event controller consists of 19 edge detector lines used to generate interrupt/event requests. Each line can be independently configured to select the trigger event (rising edge, falling edge, both) and can be ...
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STM32F101x4, STM32F101x6 than the V threshold. The interrupt service routine can then generate a warning PVD message and/or put the MCU into a safe state. The PVD is enabled by software. Refer to Table 10: Embedded reset and power control ...
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Description Each channel is connected to dedicated hardware DMA requests, with support for software trigger on each channel. Configuration is made by software and transfer sizes between source and destination are independent. The DMA can be used with the main ...
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STM32F101x4, STM32F101x6 output compare, PWM or one pulse mode output. This gives input captures / output compares / PWMs on the largest packages. The general-purpose timers can work together via the Timer Link feature for synchronization or ...
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Description An analog watchdog feature allows very precise monitoring of the converted voltage of one, some or all selected channels. An interrupt is generated when the converted voltage is outside the programmed thresholds. 2.3.24 Temperature sensor The temperature sensor has ...
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STM32F101x4, STM32F101x6 3 Pinouts and pin description Figure 3. STM32F101xx Low-density access line LQFP64 pinout PC13-TAMPER-RTC PC15-OSC32_OUT Figure 4. STM32F101xx Low-density access line LQFP48 pinout PC13-TAMPER-RTC PC15-OSC32_OUT ...
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Pinouts and pin description Figure 5. STM32F101xx Low-density access line VFQPFN48 pinout PC13-TAMPER-RTC PC14-OSC32_IN PC15-OSC32_OUT PD1-OSC_OUT Figure 6. STM32F101xx Low-density access line VFQPFN36 pinout OSC_IN/PD0 OSC_OUT/PD1 PA0-WKUP 22/ ...
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STM32F101x4, STM32F101x6 Table 4. Low-density STM32F101xx pin definitions Pins Pin name BAT PC13-TAMPER-RTC PC14-OSC32_IN PC15-OSC32_OUT OSC_IN OSC_OUT NRST ...
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Pinouts and pin description Table 4. Low-density STM32F101xx pin definitions (continued) Pins Pin name PB2 PB10 PB11 SS_1 DD_1 PB12 ...
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... This alternate function can be remapped by software to some other port pins (if available on the used package). For more details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual, available from the STMicroelectronics website: www.st.com. 8. The pins number 2 and 3 in the VFQFPN36 package, and 5 and 6 in the LQFP48 and LQFP64 packages are configured as OSC_IN/OSC_OUT after reset, however the functionality of PD0 and PD1 can be remapped by software on these pins ...
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Memory mapping 4 Memory mapping The memory map is shown in Figure 7. Memory map 0xFFFF FFFF 7 0xE010 0000 Cortex-M3 internal peripherals 0xE000 0000 6 0xC000 0000 5 0xA000 0000 4 0x8000 0000 3 0x6000 0000 2 Peripherals 0x4000 ...
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STM32F101x4, STM32F101x6 5 Electrical characteristics 5.1 Parameter conditions Unless otherwise specified, all voltages are referenced to V 5.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply ...
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Electrical characteristics Figure 8. Pin loading conditions 5.1.6 Power supply scheme Figure 10. Power supply scheme 1.8-3.6V 5 × 100 × 4.7 µ µF Caution: In Figure ...
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STM32F101x4, STM32F101x6 5.1.7 Current consumption measurement Figure 11. Current consumption measurement scheme 5.2 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 6: Current characteristics, and damage to the device. These are stress ratings only and functional ...
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Electrical characteristics Table 6. Current characteristics Symbol I Total current into V VDD I Total current out of V VSS Output current sunk by any I/O and control pin I IO Output current source by any I/Os and control pin ...
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STM32F101x4, STM32F101x6 Table 8. General operating conditions (continued) Symbol Power dissipation °C T Ambient temperature A T Junction temperature range J 1. When the ADC is used, refer recommended to power ...
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Electrical characteristics . Table 10. Embedded reset and power control block characteristics Symbol Programmable voltage V PVD detector level selection (2) V PVD hysteresis PVDhyst Power on/power down V POR/PDR reset threshold (2) V PDR hysteresis PDRhyst (2) t Reset ...
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STM32F101x4, STM32F101x6 5.3.4 Embedded reference voltage The parameters given in temperature and V Table 11. Embedded internal reference voltage Symbol V Internal reference voltage REFINT ADC sampling time when reading (1) T S_vrefint the internal reference voltage Internal reference voltage ...
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Electrical characteristics Table 12. Maximum current consumption in Run mode, code with data processing running from Flash Symbol Parameter Supply current Run mode 1. Based on characterization, not tested in production. 2. External clock is 8 MHz ...
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STM32F101x4, STM32F101x6 Figure 12. Typical current consumption in Run mode versus frequency (at 3 code with data processing running from RAM, peripherals enabled – 45°C Figure 13. Typical current consumption in Run ...
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Electrical characteristics Table 14. Maximum current consumption in Sleep mode, code running from Flash or RAM Symbol Parameter Supply current Sleep mode 1. Based on characterization, tested in production External clock is 8 MHz ...
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STM32F101x4, STM32F101x6 Figure 14. Typical current consumption values BAT 2.5 2 1.5 1 0.5 0 Figure 15. Typical current consumption in Stop mode with regulator in Run mode versus temperature ...
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Electrical characteristics Figure 16. Typical current consumption in Stop mode with regulator in Low-power mode versus temperature –45 °C Figure 17. Typical current consumption in Standby mode versus temperature at V ...
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STM32F101x4, STM32F101x6 Typical current consumption The MCU is placed under the following conditions: ● All I/O pins are in input mode with a static value at V ● All peripherals are disabled except explicitly mentioned ● The ...
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Electrical characteristics Table 17. Typical current consumption in Sleep mode, code running from Flash or RAM Symbol Parameter Supply I current in DD Sleep mode 1. Typical values are measures Add an additional power consumption of 0.8 ...
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STM32F101x4, STM32F101x6 On-chip peripheral current consumption The current consumption of the on-chip peripherals is given in under the following conditions: ● all I/O pins are in input mode with a static value at V ● all peripherals are disabled unless ...
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Electrical characteristics Table 19. High-speed external user clock characteristics Symbol User external clock source f HSE_ext frequency V OSC_IN input pin high level voltage HSEH V OSC_IN input pin low level voltage HSEL t w(HSE) OSC_IN high or low time ...
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STM32F101x4, STM32F101x6 Figure 18. High-speed external clock source AC timing diagram V HSEH 90% 10% V HSEL t r(HSE) External clock source Figure 19. Low-speed external clock source AC timing diagram V LSEH 90% 10% V LSEL t r(LSE) External ...
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Electrical characteristics Table 21. HSE 4-16 MHz oscillator characteristics Symbol f Oscillator frequency OSC_IN R Feedback resistor F Recommended load capacitance C versus equivalent serial resistance of the crystal (R i HSE driving current 2 g Oscillator transconductance m (4) ...
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STM32F101x4, STM32F101x6 resonator manufacturer for more details on the resonator characteristics (frequency, package, accuracy). Table 22. LSE oscillator characteristics (f Symbol Parameter R Feedback resistor F Recommended load capacitance C versus equivalent serial resistance of the crystal (R I LSE ...
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Electrical characteristics Figure 21. Typical application with a 32.768 kHz crystal Resonator with integrated capacitors 5.3.7 Internal clock source characteristics The parameters given in temperature and V High-speed internal (HSI) RC oscillator Table 23. HSI oscillator ...
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STM32F101x4, STM32F101x6 Low-speed internal (LSI) RC oscillator Table 24. LSI oscillator characteristics Symbol (2) f Frequency LSI (3) t LSI oscillator startup time su(LSI) (3) I LSI oscillator power consumption DD(LSI –40 to ...
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Electrical characteristics Table 26. PLL characteristics Symbol t PLL lock time LOCK Jitter Cycle-to-cycle jitter 1. Based on device characterization, not tested in production. 2. Take care of using the appropriate multiplier factors have PLL input clock ...
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STM32F101x4, STM32F101x6 Functional EMS (Electromagnetic susceptibility) While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the device is stressed by two electromagnetic events until a failure occurs. The failure is indicated by the LEDs: ...
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Electrical characteristics Electromagnetic Interference (EMI) The electromagnetic field emitted by the device is monitored while a simple application is executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with IEC61967-2 standard which specifies the test board ...
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STM32F101x4, STM32F101x6 5.3.12 I/O current injection characteristics As a general rule, current injection to the I/O pins, due to external voltage below V above V (for standard, 3 V-capable I/O pins) should be avoided during normal product DD operation. However, ...
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Electrical characteristics 5.3.13 I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in performed under the conditions summarized in compliant. Table 34. I/O static characteristics Symbol Parameter Standard IO input low level voltage V IL (1) IO ...
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STM32F101x4, STM32F101x6 All I/Os are CMOS and TTL compliant (no software configuration required). Their characteristics cover more than the strict CMOS-technology or TTL parameters. The coverage of these requirements is shown in in Figure 24 and Figure 22. Standard I/O ...
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Electrical characteristics Figure 24 tolerant I/O input characteristics - CMOS port Figure 25 tolerant I/O input characteristics - TTL port 54/79 Doc ID 15058 Rev 5 STM32F101x4, STM32F101x6 ...
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STM32F101x4, STM32F101x6 Output driving current The GPIOs (general-purpose inputs/outputs) can sink or source up to ±8 mA, and sink or source up to ±20 mA (with a relaxed V In the user application, the number of I/O pins which can ...
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Electrical characteristics Input/output AC characteristics The definition and values of input/output AC characteristics are given in Table 36, respectively. Unless otherwise specified, the parameters given in performed under the ambient temperature and V in Table 8. Table 36. I/O AC ...
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STM32F101x4, STM32F101x6 Figure 26. I/O AC characteristics definition EXT ERNAL OUTPUT ON 50pF Maximum frequency is achieved ≤ 2/3)T and if the duty cycle is (45-55%) 5.3.14 NRST pin characteristics The NRST pin ...
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Electrical characteristics 5.3.15 TIM timer characteristics The parameters given in Refer to Section 5.3.12: I/O current injection characteristics alternate function characteristics (output compare, input capture, external clock, PWM output). Table 38. TIMx Symbol t Timer resolution time res(TIM) Timer external ...
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STM32F101x4, STM32F101x6 2 Table 39 characteristics Symbol t SCL clock low time w(SCLL) t SCL clock high time w(SCLH) t SDA setup time su(SDA) t SDA data hold time h(SDA) t r(SDA) SDA and SCL rise time t ...
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Electrical characteristics 2 Figure 28 bus AC waveforms and measurement circuit I²C bus Start SDA t f(SDA) t h(STA) SCL t w(SCLH) 1. Measurement points are done at CMOS levels: 0.3V Table 40. SCL frequency ( ...
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STM32F101x4, STM32F101x6 SPI interface characteristics Unless otherwise specified, the parameters given in performed under the ambient temperature, f conditions summarized in Refer to Section 5.3.12: I/O current injection characteristics input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 41. SPI ...
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Electrical characteristics Figure 29. SPI timing diagram - slave mode and CPHA = 0 NSS input t SU(NSS) CPHA= 0 CPOL=0 t w(SCKH) CPHA w(SCKL) CPOL=1 t a(SO) MISO OUT su(SI) MOSI I NPUT Figure ...
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STM32F101x4, STM32F101x6 Figure 31. SPI timing diagram - master mode High NSS input CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 t su(MI) MISO INP UT MOSI OUTUT 1. Measurement points are done at CMOS levels: 0.3V (1) ...
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Electrical characteristics 5.3.17 12-bit ADC characteristics Unless otherwise specified, the parameters given in performed under the ambient temperature, f conditions summarized in Note recommended to perform a calibration after each power-up. Table 42. ADC characteristics Symbol Parameter V ...
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STM32F101x4, STM32F101x6 Equation 1: R AIN < R ------------------------------------------------------------- - R AIN × ADC The formula above error below 1/4 of LSB. Here (from 12-bit resolution). Table 43. R AIN T (cycles) s 1.5 7.5 ...
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Electrical characteristics Table 45. ADC accuracy Symbol ET Total unadjusted error EO Offset error EG Gain error ED Differential linearity error EL Integral linearity error 1. ADC DC accuracy values are measured after internal calibration. 2. Better performance could be ...
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STM32F101x4, STM32F101x6 Figure 33. Typical connection diagram using the ADC R AIN (1) V AIN 1. Refer to Table represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the parasitic pad capacitance ...
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Electrical characteristics 5.3.18 Temperature sensor characteristics Table 46. TS characteristics Symbol ( (1) Avg_Slope ( (2) t START (3)(2) T S_temp 1. Guaranteed by characterization, not tested in production. 2. Guaranteed by design, not tested in ...
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STM32F101x4, STM32F101x6 6 Package characteristics 6.1 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status ...
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Package characteristics Figure 35. VFQFPN48 mm, 0.5 mm pitch, package (1) outline Seating Plane Bottom View D2 1. Drawing is not to scale. 2. All leads/pads should also be ...
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STM32F101x4, STM32F101x6 Figure 37. VFQFPN36 mm, 0.5 mm pitch, package (1) outline Seating plane Pin # 0.20 1. Drawing is not to ...
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Package characteristics Figure 39. LQFP64 – mm, 64 pin low-profile quad flat package outline Drawing is not to scale. 2. Dimensions are in millimeters. Table 49. LQFP64 – mm, ...
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STM32F101x4, STM32F101x6 Figure 41. LQFP48 – 7mm, 48-pin low-profile quad flat package outline Seating plane ccc Pin 1 1 identification 1. Drawing is not to scale. ...
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Package characteristics 6.2 Thermal characteristics The maximum chip junction temperature (T Table 8: General operating conditions on page The maximum chip-junction temperature, T using the following equation: Where: max is the maximum ambient temperature in °C, ● Θ ...
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STM32F101x4, STM32F101x6 6.2.2 Evaluating the maximum junction temperature for an application When ordering the microcontroller, the temperature range is specified in the ordering information scheme shown in Each temperature range suffix corresponds to a specific guaranteed ambient temperature at maximum ...
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Ordering information scheme 7 Ordering information scheme Table 52. Ordering information scheme Example: Device family STM32 = ARM-based 32-bit microcontroller Product type F = general-purpose Device subfamily 101 = access line Pin count pins ...
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STM32F101x4, STM32F101x6 8 Revision history Table 53. Document revision history Date Revision 23-Sep-2008 07-Apr-2009 24-Sep-2009 1 Initial release. I/O information clarified on page In Table 4: Low-density STM32F101xx pin PB15, PB3/TRACESWO moved from Default column to Remap column ...
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Revision history Table 53. Document revision history (continued) Date Revision 20-May-2010 19-Apr-2011 78/79 Added VFQFPN48 package. Updated note 2 below Table 39: I2C characteristics 4 Updated Figure 28: I2C bus AC waveforms and measurement circuit(1) Updated Figure 27: Recommended NRST ...
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... STM32F101x4, STM32F101x6 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...