STM32F101C6T6A STMicroelectronics, STM32F101C6T6A Datasheet - Page 77

• Manufacturer Part Number: STM32F101C6T6A
• Description: MCU ARM 32BIT 32KB FLASH 48LQFP
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F101C6T6A

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 36MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: STM32F101x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 6 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 36 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 10 Channel
• Featured Product: STM32 Cortex-M3 Companion Products
• Eeprom Size: -
• A/d Bit Size: 12 bit
• A/d Channels Available: 10
• Height: 1.4 mm
• Length: 7 mm
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2 V
• Width: 7 mm
• For Use With: 497-10030 - STARTER KIT FOR STM32KSDKSTM32-PL - KIT IAR KICKSTART STM32 CORTEXM3497-8512 - KIT STARTER FOR STM32F10XE MCU497-8505 - KIT STARTER FOR STM32F10XE MCU497-6438 - BOARD EVALUTION FOR STM32 512K497-6289 - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U - BOARD EVAL MCBSTM32 + ULINK2497-6053 - KIT STARTER FOR STM32497-6052 - KIT STARTER FOR STM32497-6050 - KIT STARTER FOR STM32497-6049 - KIT EVALUATION LOW COST STM32497-6048 - BOARD EVALUATION FOR STM32497-6047 - KIT DEVELOPMENT FOR STM32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

STM32F101x4, STM32F101x6
8
Revision history
Table 53.
23-Sep-2008
24-Sep-2009
07-Apr-2009
Date
Document revision history
Revision
1
2
3
Initial release.
I/O information clarified
In
PB15, PB3/TRACESWO moved from Default column to Remap column.
V
Low-density access line block
and
to V
Note modified in
code with data processing running from Flash
current consumption in Sleep mode, code running from Flash or
Figure
ACC
Small text changes.
Note 5
STM32F101xx pin
V
voltage. Typical I
current consumptions in Stop and Standby
current consumption on VBAT with RTC on versus temperature at
different VBAT values
f
characteristics.
C
characteristics
32.768
Note 1
crystal.
Table 23: HSI oscillator characteristics
from
Figure 27: Recommended NRST pin protection
IEC 1000 standard updated to IEC 61000 and SAE J1752/3 updated to
IEC 61967-2 in
Jitter added to
C
R
Small text changes.
Figure 30: Power supply and reference decoupling (V
HSE_ext
REF-
RERINT
L1
ADC
AIN
Table 4: Low-density STM32F101xx pin
DDA
and C
Figure 34: Power supply and reference decoupling
HSI
Table 25: Low-power mode wakeup
max values modified in
Doc ID 15058 Rev 5
and R
is not available in the offered packages:
15,
updated and
modified below
kHz), notes modified and moved below the tables.
)
max values modified in
min modified in
and T
removed.
L2
Figure 16
AIN
replaced by C in
Coeff
and
Table 26: PLL
Section 5.3.10: EMC characteristics on page
parameters modified in
DD_VBAT
Table 12: Maximum current consumption in Run mode,
definitions.
Table 22: LSE oscillator characteristics (fLSE =
added to
Note 4
and
added.
Figure 20: Typical application with an 8 MHz
on page
Table 19: High-speed external user clock
value added in
Figure 17
added in
Table 43: RAIN max for fADC = 14
Table 11: Embedded internal reference
characteristics.
Table 21: HSE 4-16 MHz oscillator
diagram,
Changes
Table 23: HSI oscillator
1.
Figure 7: Memory map
show typical curves.
Table 4: Low-density
modified. Conditions removed
Figure 10: Power supply scheme
Table 42: ADC
Table 15: Typical and maximum
timings.
definitions: PB4, PB13, PB14,
modes.
Figure 1: STM32F101xx
and
modified.
Table 14: Maximum
Figure 14: Typical
REF+
Revision history
characteristics.
updated,
characteristics.
not connected
modified.
48.
MHz.
RAM.
77/79