STM32F101VDT6 STMicroelectronics, STM32F101VDT6 Datasheet - Page 82

MCU ARM 32BIT 384K FLASH 100LQFP

STM32F101VDT6

Manufacturer Part Number
STM32F101VDT6
Description
MCU ARM 32BIT 384K FLASH 100LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F101VDT6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
36MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
80
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
STM32F101x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
48 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
80
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
STM3210E-EVAL
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
On-chip Dac
12 bit, 2 Channel
Featured Product
STM32 Cortex-M3 Companion Products
Eeprom Size
-
For Use With
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Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Electrical characteristics
82/106
Table 50.
1. Guaranteed by design, not tested in production.
2. f
3. The maximum hold time of the Start condition has only to be met if the interface does not stretch the low
4. The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the
t
w(STO:STA)
Symbol
t
t
t
t
t
w(SCLH)
t
w(SCLL)
t
su(SDA)
t
t
t
su(STO)
t
su(STA)
h(SDA)
higher than 4 MHz to achieve the maximum fast mode I
period of SCL signal.
undefined region of the falling edge of SCL.
h(STA)
r(SDA)
r(SCL)
f(SDA)
f(SCL)
PCLK1
C
b
must be higher than 2 MHz to achieve the maximum standard mode I
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
SDA and SCL rise time
SDA and SCL fall time
Start condition hold time
Repeated Start condition setup
time
Stop condition setup time
Stop to Start condition time (bus
free)
Capacitive load for each bus line
I
2
C characteristics
Parameter
Doc ID 14610 Rev 7
STM32F101xC, STM32F101xD, STM32F101xE
Standard mode I
2
Min
250
0
4.7
4.0
4.0
4.7
4.0
4.7
C frequency.
(3)
1000
Max
300
400
2
C
(1)
2
C frequency. It must be
Fast mode I
20+0.1C
Min
100
0
1.3
0.6
0.6
0.6
1.3
0.6
(4)
b
2
900
Max
C
300
300
400
(1)(2)
(3)
Unit
pF
µs
ns
µs
µs
µs

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