MC68HC908QY4CDTE Freescale Semiconductor, MC68HC908QY4CDTE Datasheet - Page 131

IC MCU 4K FLASH W/ADC 16-TSSOP

MC68HC908QY4CDTE

Manufacturer Part Number
MC68HC908QY4CDTE
Description
IC MCU 4K FLASH W/ADC 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908QY4CDTE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Processor Series
HC08Q
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
14
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 4 Channel
Controller Family/series
HC08
No. Of I/o's
14
Ram Memory Size
128Byte
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

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Part Number:
MC68HC908QY4CDTE
Manufacturer:
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ELSxB and ELSxA — Edge/Level Select Bits
TOVx — Toggle-On-Overflow Bit
Freescale Semiconductor
When ELSxB:A = 00, this read/write bit selects the initial output level of the TCHx pin (see
Reset clears the MSxA bit.
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
When ELSxB and ELSxA are both clear, channel x is not connected to an I/O port, and pin TCHx is
available as a general-purpose I/O pin.
the ELSxB and ELSxA bits.
When channel x is an output compare channel, this read/write bit controls the behavior of the channel
x output when the TIM counter overflows. When channel x is an input capture channel, TOVx has no
effect Reset clears the TOVx bit.
1 = Initial output level low
0 = Initial output level high
1 = Channel x pin toggles on TIM counter overflow.
0 = Channel x pin does not toggle on TIM counter overflow.
MSxB
X
X
0
0
0
0
0
0
0
1
1
1
Before changing a channel function by writing to the MSxB or MSxA bit, set
the TSTOP and TRST bits in the TIM status and control register (TSC).
After initially enabling a TIM channel register for input capture operation
and selecting the edge sensitivity, clear CHxF to ignore any erroneous
edge detection flags.
When TOVx is set, a TIM counter overflow takes precedence over a
channel x output compare if both occur at the same time.
MSxA
X
X
X
0
1
0
0
0
1
1
1
1
ELSxB
0
0
0
1
1
0
0
1
1
0
1
1
Table 14-3. Mode, Edge, and Level Selection
MC68HC908QY/QT Family Data Sheet, Rev. 6
ELSxA
0
0
1
0
1
0
1
0
1
1
0
1
Table 14-3
Output compare
Buffered output
buffered PWM
Output preset
Input capture
compare or
or PWM
Mode
NOTE
NOTE
NOTE
shows how ELSxB and ELSxA work. Reset clears
Pin under port control; initial output level high
Pin under port control; initial output level low
Capture on rising edge only
Capture on falling edge only
Capture on rising or falling edge
Software compare only
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
Configuration
Input/Output Registers
Table
14-3).
131

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