R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 13

MCU 1KB FLASH 16K ROM 20-LSSOP

R5F21324CNSP#U0

Manufacturer Part Number
R5F21324CNSP#U0
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Cr
Datasheet

Specifications of R5F21324CNSP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
11.
12.
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
12.1
12.2
10.1.1
11.1.1
11.1.2
11.1.3
11.1.4
11.1.5
11.2.1
11.2.2
11.2.3
11.3.1
11.3.2
11.3.3
11.3.4
11.3.5
11.3.6
11.3.7
11.3.8
11.3.9
11.3.10 Interrupt Priority Level Selection Circuit ......................................................................................... 136
11.4.1
11.4.2
11.4.3
11.4.4
11.4.5
11.5.1
11.6.1
11.6.2
11.8.1
11.8.2
11.8.3
11.8.4
11.8.5
Interrupts ..................................................................................................................................... 122
ID Code Areas ............................................................................................................................ 149
Overview ............................................................................................................................................... 122
Registers ................................................................................................................................................ 126
Interrupt Control .................................................................................................................................... 130
INT Interrupt ......................................................................................................................................... 137
Key Input Interrupt ................................................................................................................................ 140
Address Match Interrupt ........................................................................................................................ 142
Timer RC Interrupt, Synchronous Serial Communication Unit Interrupt, I
Flash Memory Interrupt (Interrupts with Multiple Interrupt Request Sources) .................................... 144
Notes on Interrupts ................................................................................................................................ 146
Overview ............................................................................................................................................... 149
Functions ............................................................................................................................................... 150
Protect Register (PRCR) ................................................................................................................... 121
Types of Interrupts ............................................................................................................................ 122
Software Interrupts ........................................................................................................................... 123
Special Interrupts .............................................................................................................................. 124
Peripheral Function Interrupts .......................................................................................................... 124
Interrupts and Interrupt Vectors ........................................................................................................ 125
Interrupt Control Register
(TREIC, S2TIC, S2RIC, KUPIC, ADIC, S0TIC, S0RIC, TRAIC, TRBIC, U2BCNIC, VCMP1IC,
VCMP2IC) ........................................................................................................................................ 127
Interrupt Control Register (FMRDYIC, TRCIC, SSUIC/IICIC) ..................................................... 128
INTi Interrupt Control Register (INTiIC) (i = 0, 1, 3) ...................................................................... 129
I Flag ................................................................................................................................................. 130
IR Bit ................................................................................................................................................. 130
Bits ILVL2 to ILVL0, IPL ................................................................................................................ 130
Interrupt Sequence ............................................................................................................................ 131
Interrupt Response Time ................................................................................................................... 132
IPL Change when Interrupt Request is Acknowledged .................................................................... 132
Saving Registers ............................................................................................................................... 133
Returning from Interrupt Routine ..................................................................................................... 135
Interrupt Priority ............................................................................................................................... 135
INTi Interrupt (i = 0, 1, 3) ................................................................................................................. 137
INT Interrupt Input Pin Select Register (INTSR) ............................................................................. 137
External Input Enable Register 0 (INTEN) ...................................................................................... 138
INT Input Filter Select Register 0 (INTF) ........................................................................................ 138
INTi Input Filter (i = 0, 1, 3) ............................................................................................................. 139
Key Input Enable Register 0 (KIEN) ................................................................................................ 141
Address Match Interrupt Enable Register i (AIERi) (i = 0 or 1) ...................................................... 143
Address Match Interrupt Register i (RMADi) (i = 0 or 1) ................................................................ 143
Reading Address 00000h .................................................................................................................. 146
SP Setting .......................................................................................................................................... 146
External Interrupt and Key Input Interrupt ....................................................................................... 146
Changing Interrupt Sources .............................................................................................................. 147
Rewriting Interrupt Control Register ................................................................................................ 148
A - 4
2
C bus Interface Interrupt, and

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