R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 218

• Manufacturer Part Number: R5F21324CNSP#U0
• Description: MCU 1KB FLASH 16K ROM 20-LSSOP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/32Cr

Specifications of R5F21324CNSP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-LSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 189 of 573
17. Timer RA
Timer RA is an 8-bit timer with an 8-bit prescaler.
17.1
Figure 17.1
Table 17.1
TRAIO pin
TRAIO
TRAO
The prescaler and timer each consist of a reload register and counter. The reload register and counter are allocated
at the same address, and can be accessed when accessing registers TRAPRE and TRA (refer to Tables 17.2 to 17.6
the Specifications of Each Mode).
The count source for timer RA is the operating clock that regulates the timing of timer operations such as counting
and reloading.
Figure 17.1 shows a Timer RA Block Diagram. Table 17.1 lists Pin Configuration of Timer RA.
Timer RA contains the following five operating modes:
• Timer mode:
• Pulse output mode:
• Event counter mode:
• Pulse width measurement mode:
• Pulse period measurement mode:
TRAO pin
Pin Name
f32
f1
f8
TIPF1 to TIPF0 bits
(1)
= 01b
= 10b
= 11b
Overview
Note:
1. Bits TRAIOSEL0 and TRAIOSEL1 in the TRASR register are used to select which pin is assigned.
TCK2 to TCK0 bit
fOCO
fC32
Event enabled for “L” period of
fC
f1
f8
f2
Pin Configuration of Timer RA
Timer RA Block Diagram
Event input always enabled
= 110b
= 000b
= 001b
= 010b
= 011b
= 100b
TRCIOD (timer RC output)
Digital
filter
P1_5 or P1_7
P3_7
TIPF1 to TIPF0 bits
= other than
= 00b
Assigned Pin
TOENA bit
Do not set
000b
TIOGT1 to TIOGT0 bits
switching
Polarity
= 00b
= 01b
= 10b
TMOD2 to TMOD0
= other than 010b
The timer counts the internal count source.
The timer counts the internal count source and outputs pulses which invert
the polarity by underflow of the timer.
The timer counts external pulses.
The timer measures the pulse width of an external pulse.
The timer measures the pulse period of an external pulse.
TMOD2 to TMOD0 = 001b
TOPCR bit
TCSTF, TSTOP: TRACR register
TEDGSEL, TOPCR, TOENA, TIPF1, TIPF0, TIOGT1, TIOGT0: TRAIOC register
TMOD2 to TMOD0, TCK2 to TCK0, TCKCUT: TRAMR register
Output
TMOD2 to TMOD0
= 010b
TMOD2 to TMOD0
= 011b or 100b
TCKCUT bit
I/O
I/O
TCSTF bit
TEDGSEL = 1
TEDGSEL = 0
Function differs according to the mode.
Refer to descriptions of individual modes
for details
Count control
TRAPRE register
register
Reload
(prescaler)
circle
Counter
Q
Q
Data bus
completion signal
flip-flop
Toggle
Measurement
CLR
Reload
register
TRA register
CK
Counter
(timer)
Function
Write to TRAMR register
Write 1 to TSTOP bit
Underflow signal
Timer RA interrupt
17. Timer RA