R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 273

MCU 1KB FLASH 16K ROM 20-LSSOP

R5F21324CNSP#U0

Manufacturer Part Number
R5F21324CNSP#U0
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Cr
Datasheet

Specifications of R5F21324CNSP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 244 of 573
19.4
Table 19.7
j = A, B, C, or D
Count source
Count operation
Count period
Count start condition
Count stop condition
Interrupt request generation
timing
TRCIOA, TRCIOB, TRCIOC,
and TRCIOD pin functions
INT0 pin function
Read from timer
Write to timer
Select functions
This function measures the width or period of an external signal. An external signal input to the TRCIOj (j = A, B,
C, or D) pin acts as a trigger for transferring the contents of the TRC register (counter) to the TRCGRj register
(input capture). The input capture function, or any other mode or function, can be selected for each individual pin.
The TRCGRA register can also select fOCO128 signal as input-capture trigger input.
Table 19.7 lists the Specifications of Input Capture Function, Figure 19.7 shows a Block Diagram of Input Capture
Function, Table 19.8 lists the Functions of TRCGRj Register when Using Input Capture Function, and Figure 19.8
shows an Operating Example of Input Capture Function.
Timer Mode (Input Capture Function)
Item
Specifications of Input Capture Function
f1, f2, f4, f8, f32, fOCO40M, fOCO-F
Increment
• The CCLR bit in the TRCCR1 register is set to 0 (free running operation):
1 (count starts) is written to the TSTART bit in the TRCMR register.
0 (count stops) is written to the TSTART bit in the TRCMR register.
Programmable I/O port or INT0 interrupt input
The count value can be read by reading TRC register.
External signal (rising edge) input to TRCCLK pin
• The CCLR bit in the TRCCR1 register is set to 1 (TRC register set to
The TRC register retains a value before count stops.
• Input capture (valid edge of TRCIOj input or fOCO128 signal edge)
• The TRC register overflows.
Programmable I/O port or input capture input (selectable individually for
each pin)
The TRC register can be written to.
• Input capture input pin selection
• Input capture input valid edge selection
• Buffer operation (Refer to 19.3.2 Buffer Operation .)
• Digital filter (Refer to 19.3.3 Digital Filter .)
• Timing for setting the TRC register to 0000h
• Input-capture trigger selected
1/fk × 65,536
fk: Count source frequency
0000h at TRCGRA compare match):
1/fk × (n + 1)
n: TRCGRA register setting value
One or more of pins TRCIOA, TRCIOB, TRCIOC, and TRCIOD
Rising edge, falling edge, or both rising and falling edges
Overflow or input capture
fOCO128 can be selected for input-capture trigger input of the
TRCGRA register.
Specification
19. Timer RC

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