MC908LJ24CPBER Freescale Semiconductor, MC908LJ24CPBER Datasheet - Page 271

• Manufacturer Part Number: MC908LJ24CPBER
• Description: IC MCU 24K FLASH 4/8MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LJ24CPBER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SPI
• Peripherals: LCD, LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 40
• Ram Memory Size: 768Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08LJ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

13.11.2 SCI Control Register 2
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
NOTE:
Infrared Serial Communications Interface Module (IRSCI)
PTY — Parity Bit
Changing the PTY bit in the middle of a transmission or reception can
generate a parity error.
SCI control register 2:
This read/write bit determines whether the SCI generates and checks
for odd parity or even parity. (See
bit.
•
•
•
•
•
M
0
1
0
0
1
1
Control Bits
1 = Odd parity
0 = Even parity
Enables the following CPU interrupt requests:
–
–
–
–
Enables the transmitter
Enables the receiver
Enables SCI wakeup
Transmits SCI break characters
Enables the SCTE bit to generate transmitter CPU interrupt
requests
Enables the TC bit to generate transmitter CPU interrupt
requests
Enables the SCRF bit to generate receiver CPU interrupt
requests
Enables the IDLE bit to generate receiver CPU interrupt
requests
PEN:PTY
0X
0X
10
11
10
11
Table 13-6. Character Format Selection
Infrared Serial Communications Interface Module (IRSCI)
Start
Bits
1
1
1
1
1
1
Data
Bits
8
9
7
7
8
8
Table
Character Format
Parity
None
None
Even
Even
Odd
Odd
13-6.) Reset clears the PTY
Stop
Bits
1
1
1
1
1
1
Character
I/O Registers
Length
10 bits
11 bits
10 bits
10 bits
11 bits
11 bits
Data Sheet
271