MC908LJ24CFUER Freescale Semiconductor, MC908LJ24CFUER Datasheet - Page 153

IC MCU 24K FLASH 8MHZ SPI 64-QFP

MC908LJ24CFUER

Manufacturer Part Number
MC908LJ24CFUER
Description
IC MCU 24K FLASH 8MHZ SPI 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CFUER

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CFUER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
9.6.1.2 SWI Instruction
9.6.1.3 Interrupt Status Registers
9.6.1.4 Interrupt Status Register 1
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
NOTE:
Address:
The SWI instruction is a non-maskable instruction that causes an
interrupt regardless of the state of the interrupt mask (I bit) in the
condition code register.
A software interrupt pushes PC onto the stack. A software interrupt does
not push PC – 1, as a hardware interrupt does.
The flags in the interrupt status registers identify maskable interrupt
sources.
status register flags that they set. The interrupt status registers can be
useful for debugging.
IF6–IF1 — Interrupt Flags 6–1
Bit 0 and Bit 1 — Always read 0
Reset:
Read:
Write:
These flags indicate the presence of interrupt requests from the
sources shown in
1 = Interrupt request present
0 = No interrupt request present
$FE04
Bit 7
IF6
Table 9-3
R
R
0
System Integration Module (SIM)
Figure 9-12. Interrupt Status Register 1 (INT1)
= Reserved
IF5
R
6
0
summarizes the interrupt sources and the interrupt
Table
IF4
R
5
0
9-3.
IF3
R
4
0
IF2
R
3
0
System Integration Module (SIM)
IF1
R
2
0
Exception Control
R
1
0
0
Data Sheet
Bit 0
R
0
0
153

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