R5F21334CNFP#U0 Renesas Electronics America, R5F21334CNFP#U0 Datasheet - Page 308

• Manufacturer Part Number: R5F21334CNFP#U0
• Description: MCU 1KB FLASH 16K ROM 32-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/33Cr

Specifications of R5F21334CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 27
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/33C Group
REJ09B0570-0100 Rev.1.00 Dec. 14, 2009
Page 278 of 589
19.7.2
Notes:
19.7.3
Notes:
After Reset
1. Enabled when in PWM mode.
2. Enabled when in output compare function, PWM mode, or PWM2 mode. For notes on PWM2 mode, refer to
3. Enabled when in PWM2 mode.
After Reset
1. These bits are enabled for the input capture function.
2. These bits are enabled when in PWM2 mode and bits TCEG1 to TCEG0 in the TRCCR2 register are set to 01b,
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0130h
Address 0131h
19.9.6 TRCMR Register in PWM2 Mode.
10b, or 11b (TRCTRG trigger input enabled).
Symbol TCEG1
Symbol
DFTRG TRCTRG pin digital filter function select bit
Symbol
TCEG0 TRCTRG input edge select bit
TCEG1
Symbol
DFCK0 Clock select bits for digital filter function
DFCK1
Bit
POLB
POLC
POLD
Bit
CSEL
DFC
DFD
DFA
DFB
Timer RC Control Register 2 (TRCCR2) in PWM2 Mode
Timer RC Digital Filter Function Select Register (TRCDF) in PWM2 Mode
—
—
—
DFCK1
b7
b7
0
0
PWM mode output level control
bit B
PWM mode output level control
bit C
PWM mode output level control
bit D
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
TRC count operation select bit
TRCIOA pin digital filter function select bit
TRCIOB pin digital filter function select bit
TRCIOC pin digital filter function select bit
TRCIOD pin digital filter function select bit
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
(1)
(1)
(1)
TCEG0
DFCK0
b6
b6
0
0
Bit Name
Bit Name
CSEL
b5
b5
—
0
0
DFTRG
b4
b4
—
(3)
(2)
1
0
0: TRCIOB output level selected as “L” active
1: TRCIOB output level selected as “H” active
0: TRCIOC output level selected as “L” active
1: TRCIOC output level selected as “H” active
0: TRCIOD output level selected as “L” active
1: TRCIOD output level selected as “H” active
0: Count continues at compare match with the
1: Count stops at compare match with the TRCGRA
b7 b6
0 0: Disable the trigger input from the TRCTRG pin
0 1: Rising edge selected
1 0: Falling edge selected
1 1: Both edges selected
TRCGRA register
register
(1, 2)
DFD
b3
b3
—
1
0
(1)
(1)
(1)
(1)
(2)
0: Function is not used
1: Function is used
b7 b6
0 0: f32
0 1: f8
1 0: f1
1 1: Count source (clock selected by bits
POLD
DFC
TCK2 to TCK0 in the TRCCR1
register)
b2
b2
0
0
Function
POLC
DFB
b1
b1
0
0
Function
POLB
DFA
b0
b0
0
0
19. Timer RC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—