MC908LJ24CFQE Freescale Semiconductor, MC908LJ24CFQE Datasheet - Page 161

IC MCU 24K FLASH 8MHZ SPI 80-QFP

MC908LJ24CFQE

Manufacturer Part Number
MC908LJ24CFQE
Description
IC MCU 24K FLASH 8MHZ SPI 80-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CFQE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
48
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Controller Family/series
HC08
No. Of I/o's
48
Ram Memory Size
768Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CFQE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
9.8.2 SIM Reset Status Register
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
Address:
This register contains six flags that show the source of the last reset
provided all previous reset status bits have been cleared. Clear the SIM
reset status register by reading it. A power-on reset sets the POR bit and
clears all other bits in the register.
POR — Power-On Reset Bit
PIN — External Reset Bit
COP — Computer Operating Properly Reset Bit
ILOP — Illegal Opcode Reset Bit
ILAD — Illegal Address Reset Bit (opcode fetches only)
LVI — Low-Voltage Inhibit Reset Bit
Reset:
Read:
Write:
1 = Last reset caused by POR circuit
0 = Read of SRSR
1 = Last reset caused by external reset pin (RST)
0 = POR or read of SRSR
1 = Last reset caused by COP counter
0 = POR or read of SRSR
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR
1 = Last reset caused by the LVI circuit
0 = POR or read of SRSR
$FE01
POR
Bit 7
1
Figure 9-21. SIM Reset Status Register (SRSR)
System Integration Module (SIM)
= Unimplemented
PIN
6
0
COP
5
0
ILOP
4
0
ILAD
3
0
System Integration Module (SIM)
2
0
0
LVI
1
0
SIM Registers
Data Sheet
Bit 0
0
0
161

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