MC908LJ24CFQE Freescale Semiconductor, MC908LJ24CFQE Datasheet - Page 336

IC MCU 24K FLASH 8MHZ SPI 80-QFP

MC908LJ24CFQE

Manufacturer Part Number
MC908LJ24CFQE
Description
IC MCU 24K FLASH 8MHZ SPI 80-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CFQE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
48
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Controller Family/series
HC08
No. Of I/o's
48
Ram Memory Size
768Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CFQE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Analog-to-Digital Converter (ADC)
Data Sheet
336
AIEN
INTERRUPT
INTERNAL
DATA BUS
LOGIC
COCO
READ DDRAx/DDRBx
WRITE DDRAx/DDRBx
WRITE PTAx/PTBx
READ PTAx/PTBx
CONVERSION
COMPLETE
BUS CLOCK
CGMXCLK
RESET
logic and can be used as general-purpose I/O pins. Writes to the port
data register or data direction register will not have any affect on the port
pin that is selected by the ADC. Read of a port pin which is in use by the
ADC will return the pin condition if the corresponding DDR bit is at
logic 0. If the DDR bit is at logic 1, the value in the port data latch is read.
Figure 16-2. ADC Block Diagram
ADC DATA REGISTERS
Analog-to-Digital Converter (ADC)
ADIV[2:0]
DDRAx/DDRBx
ADRH
PTAx/PTBx
GENERATOR
CLOCK
ADC
ADC CLOCK
ADRL
ADICLK
VOLTAGE IN
DISABLE
(V
ADC
ADIN
)
DISABLE
CHANNEL
ADCH[4:0]
ADC0–ADC5
(6 CHANNELS)
MC68HC908LJ24/LK24 — Rev. 2.1
SELECT
Freescale Semiconductor
1.2V
BANDGAP
REFERENCE
PTAx/PTBx
V
V
V
REFH
REFL
LCD

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