R5F21272SNFP#U0 Renesas Electronics America, R5F21272SNFP#U0 Datasheet - Page 216

IC R8C/27 MCU FLASH 32LQFP

R5F21272SNFP#U0

Manufacturer Part Number
R5F21272SNFP#U0
Description
IC R8C/27 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/27r
Datasheet

Specifications of R5F21272SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
14.3.3.4
When using the timer mode’s output compare function, the PWM mode, or the PWM2 mode, pulse output from
the TRCIOj (j = A, B, C, or D) output pin can be forcibly cut off and the TRCIOj pin set to function as a
programmable I/O port by means of input to the INT0 pin.
A pin used for output by the timer mode’s output compare function, the PWM mode, or the PWM2 mode can be
set to function as the timer RC output pin by setting the Ej bit in the TRCOER register to 0 (timer RC output
enabled). If “L” is input to the INT0 pin while the PTO bit in the TRCOER register is set to 1 (pulse output
forced cutoff signal input INT0 enabled), bits EA, EB, EC, and ED in the TRCOER register are all set to 1
(timer RC output disabled, TRCIOj output pin functions as the programmable I/O port). When one or two
cycles of the timer RC operation clock after “L” input to the INT0 pin (refer to Table 14.11 Timer RC
Operation Clock) has elapsed, the TRCIOj output pin becomes a programmable I/O port.
Make the following settings to use this function.
The IR bit in the INT0IC register is set to 1 (interrupt request) in accordance with the setting of the POL bit and
a change in the INT0 pin input (refer to 12.6 Notes on Interrupts).
For details on interrupts, refer to 12. Interrupts.
• Set the pin state following forced cutoff of pulse output (high impedance (input), “L” output, or “H”
• Set the INT0EN bit to 1 (INT0 input enabled) and the INT0PL bit to 0 (one edge) in the INTEN register.
• Set the PD4_5 bit in the PD4 register to 0 (input mode).
• Select the INT0 digital filter by means of bits INT0F1 to INT0F0 in the INTF register.
• Set the PTO bit in the TRCOER register to 1 (pulse output forced cutoff signal input INT0 enabled).
Sep 26, 2008
output) (refer to 7. Programmable I/O Ports).
Forced Cutoff of Pulse Output
Page 197 of 453
14. Timers

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