R5F21274SNFP#U0 Renesas Electronics America, R5F21274SNFP#U0 Datasheet - Page 229

IC R8C/27 MCU FLASH 32LQFP

R5F21274SNFP#U0

Manufacturer Part Number
R5F21274SNFP#U0
Description
IC R8C/27 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/27r
Datasheet

Specifications of R5F21274SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
14.3.6
Table 14.20
j = B, C, or D
h = A, B, C, or D
Count source
Count operation
PWM waveform
Count start condition
Count stop condition
Interrupt request generation
timing
TRCIOA pin function
TRCIOB, TRCIOC, and
TRCIOD pin functions
INT0 pin function
Read from timer
Write to timer
Select functions
This mode outputs PWM waveforms. A maximum of three PWM waveforms with the same period are output.
The PWM mode, or the timer mode, can be selected for each individual pin. (However, since the TRCGRA
register is used when using any pin for the PWM mode, the TRCGRA register cannot be used for the timer
mode.)
Table 14.20 lists the Specifications of PWM Mode, Figure 14.51 shows a Block Diagram of PWM Mode,
Figure 14.52 shows the register associated with the PWM mode, Table 14.21 lists the Functions of TRCGRj
Register in PWM Mode, and Figures 14.53 and 14.54 show Operating Examples of PWM Mode.
Sep 26, 2008
PWM Mode
Item
Specifications of PWM Mode
Page 210 of 453
f1, f2, f4, f8, f32, fOCO40M, or external signal (rising edge) input to
1 (count starts) is written to the TSTART bit in the TRCMR register.
Programmable I/O port, pulse output forced cutoff signal input, or INT0
TRCCLK pin
Increment
PWM period: 1/fk × (m + 1)
Active level width: 1/fk × (m - n)
Inactive width: 1/fk × (n + 1)
0 (count stops) is written to the TSTART bit in the TRCMR register.
• Compare match (contents of registers TRC and TRCGRh match)
• The TRC register overflows.
Programmable I/O port
Programmable I/O port or PWM output (selectable individually by pin)
interrupt input
The count value can be read by reading the TRC register.
The TRC register can be written to.
• One to three pins selectable as PWM output pins per channel
• Active level selectable by individual pin
• Buffer operation (Refer to 14.3.3.2 Buffer Operation.)
• Pulse output forced cutoff signal input (Refer to 14.3.3.4 Forced Cutoff
of Pulse Output.)
fk: Count source frequency
m: TRCGRA register setting value
n: TRCGRj register setting value
PWM output pin retains output level before count stops, TRC register
retains value before count stops.
One or more of pins TRCIOB, TRCIOC, and TRCIOD
n+1
m+1
m-n
Specification
(“L” is active level)
14. Timers

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