R5F21274SNFP#U0 Renesas Electronics America, R5F21274SNFP#U0 Datasheet - Page 318

IC R8C/27 MCU FLASH 32LQFP

R5F21274SNFP#U0

Manufacturer Part Number
R5F21274SNFP#U0
Description
IC R8C/27 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/27r
Datasheet

Specifications of R5F21274SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
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Manufacturer:
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Manufacturer:
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Manufacturer:
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Quantity:
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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 16.30
Port Mode Register
b7 b6 b5 b4
NOTE:
1. The UART1 pins can be selected by using bits U1PINSEL, TXD1SEL and TXD1EN, and bits UART1SEL1 and
UART1SEL0 in the PINSR1 register.
×: 0 or 1
Sep 26, 2008
PINSR1 Register
UART1SEL0 bit
UART1SEL1,
b3 b2 b1
00b
01b
10b
PMR Register
b0
Bit Symbol
U1PINSEL
TXD1SEL
INT1SEL
TXD1EN
(b2-b1)
SSISEL
Symbol
IICSEL
PMR
Page 299 of 453
Pin Function
P3_7(TXD1)
P3_7(RXD1)
P0_0(TXD1)
P3_7(TXD1)
P4_5(RXD1)
P3_6(TXD1)
P3_6(RXD1)
P0_0(TXD1)
_____
INT1
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
SSI pin select bit
TXD1 pin sw itch bit
Port/TXD1 pin sw itch bit
TXD1/RXD1 select bit
SSU / I
pin select bit
2
C bus pin sw itch bit
U1PINSEL bit
Address
Bit Name
×
0
1
×
0
00F8h
(1)
(1)
PMR Register
(1)
TXD1SEL bit
×
1
1
×
×
1
0 : P1_5, P1_7
1 : P3_6
0 : P3_3
1 : P1_6
0 : P0_0
1 : P3_6, P3_7
0 : Programmable I/O port
1 : TXD1
0 : RXD1
1 : TXD1
0 : Selects SSU function
1 : Selects I
TXD1EN bit
1
0
×
×
1
0
×
16. Clock Synchronous Serial Interface
2
C bus function
After Reset
Function
00h
RW
RW
RW
RW
RW
RW
RW

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