R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 196

MCU 1KB FLASH 32K ROM 48-LQFP

R5F21346CNFP#U0

Manufacturer Part Number
R5F21346CNFP#U0
Description
MCU 1KB FLASH 32K ROM 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/34Cr
Datasheet

Specifications of R5F21346CNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
43
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
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R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 163 of 723
Figure 11.8
11.3.10 Interrupt Priority Level Selection Circuit
The interrupt priority level selection circuit is used to select the highest priority interrupt.
Figure 11.8 shows the Interrupt Priority Level Selection Circuit.
Interrupt Priority Level Selection Circuit
Note:
UART2 bus collision detection
1. Selectable by the IICSEL bit in the SSUIICSR register.
Priority level of interrupts
Oscillation stop detection
UART2 transmit/NACK2
UART2 receive/ACK2
Flash memory ready
Voltage monitor 1
Voltage monitor 2
Voltage monitor 1
Voltage monitor 2
SSU / I
UART1 transmit
UART0 transmit
Watchdog timer
UART1 receive
UART0 receive
A/D conversion
Address match
Timer RD0
Timer RD1
Timer RB
Timer RA
Timer RC
Timer RE
Key input
INT2
INT3
INT4
INT0
INT1
I flag
IPL
2
C bus
(1)
Level 0 (initial value)
Highest
Lowest
Peripheral function interrupt priority
(if the priority levels are same)
Interrupt request level
selection output signal
Interrupt request
acknowledgement
11. Interrupts

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