R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 319

• Manufacturer Part Number: R5F21346CNFP#U0
• Description: MCU 1KB FLASH 32K ROM 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/34Cr

Specifications of R5F21346CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 43
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 286 of 723
Figure 19.12
The above applies under the following conditions:
• Bits BFC and BFD in the TRCMR register are set to 0 (registers TRCGRC and TRCGRD are not used as buffer register).
• Bits EA and EB in the TRCOER register are set to 0 (enable TRCIOA and TRCIOB pin outputs).
• The CCLR bit in the TRCCR1 register are set to 1 (set the TRC register to 0000h by compare match in the TRCGRA register).
• Bits TOA and TOB in the TRCCR1 register are set to 0 (initial output “L” to compare match).
• Bits IOA2 to IOA0 in the TRCIOR0 register are set to 011b (TRCIOA output inverted at TRCGRA register compare match).
• Bits IOB2 to IOB0 in the TRCIOR0 register are set to 011b (TRCIOB output inverted at TRCGRB register compare match).
• Bits IOC2 to IOC0 in the TRCIOR1 register are set to 011b (TRCIOA output inverted at TRCGRC register compare match).
• The IOC3 bit in the TRCIOR1 register are set to 0 (TRCIOA output register).
• Bits IOD2 to IOD0 in the TRCIOR1 register are set to 011b (TRCIOB output inverted at TRCGRD register compare match).
• The IOD3 bit in the TRCIOR1 register are set to 0 (TRCIOB output register).
• The CSEL bit in the TRCCR2 register are set to 0 (TRC continues counting after compare match).
TRCSR register
TRCSR register
TRCSR register
TRCSR register
TRCIOA output
TRCIOB output
Count source
IMFA bit in
IMFC bit in
IMFB bit in
IMFD bit in
Value in TRC register
FFFFh
Pin and TRCGRD Register is Used for Output Control of TRCIOB Pin
Operating Example When TRCGRC Register is Used for Output Control of TRCIOA
0000h
Initial output “L”
Initial output “L”
m
n
p
q
Output inverted by compare match
Set to 0 by a program
Output inverted by compare match
Set to 0 by a program
q+1
p+1
n+1
p-q
m+1
Set to 0 by a program
m: Value set in TRCGRA register
n: Value set in TRCGRC register
p: Value set in TRCGRB register
q: Value set in TRCGRD register
Set to 0 by a program
m-n
19. Timer RC