R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 476

• Manufacturer Part Number: R5F21346CNFP#U0
• Description: MCU 1KB FLASH 32K ROM 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/34Cr

Specifications of R5F21346CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 43
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 443 of 723
Table 22.4
TXD0 (P1_4)
RXD0 (P1_5)
CLK0 (P1_6)
TXD1 (P0_1 or
P6_3)
RXD1 (P0_2 or
P6_4)
CLK1 (P0_3,
P6_2, or P6_5)
Table 22.4 lists the I/O Pin Functions in Clock Synchronous Serial I/O Mode.
After UARTi (i = 0 or 1) operating mode is selected, the TXDi pin outputs a “H” level until transfer starts. (If the
NCH bit is set to 1 (N-channel open-drain output), this pin is in the high-impedance state.)
Pin Name
I/O Pin Functions in Clock Synchronous Serial I/O Mode
Serial data output
Serial data input
Transfer clock output CLK0SEL0 bit in U0SR register = 1
Transfer clock input
Serial data output
Serial data input
Transfer clock output • CLK1 (P0_3)
Transfer clock input
Function
TXD0SEL0 bit in U0SR register = 1
For reception only:
P1_4 can be used as a port by setting TXD0SEL0 bit = 0.
RXD0SEL0 bit in U0SR register = 1
PD1_5 bit in PD1 register = 0
For transmission only:
P1_5 can be used as a port by setting RXD0SEL0 bit = 0.
CKDIR bit in U0MR register = 0
CLK0SEL0 bit in U0SR register = 1
CKDIR bit in U0MR register = 1
PD1_6 bit in PD1 register = 0
• TXD1 (P0_1)
• TXD1 (P6_3)
• For reception only:
• RXD1 (P0_2)
• RXD1 (P6_4)
• For transmission only:
• CLK1 (P6_2)
• CLK1 (P6_5)
• CLK1 (P0_3)
• CLK1 (P6_2)
• CLK1 (P6_5)
Bits TXD1SEL1 to TXD1SEL0 in U1SR register = 01b (P0_1)
Bits TXD1SEL1 to TXD1SEL0 in U1SR register = 10b (P6_3)
P0_1 and P6_3 can be used as a port by setting bits TXD1SEL1
to TXD1SEL0 = 00b.
Bits RXD1SEL1 to RXD1SEL0 in U1SR register = 01b (P0_2)
PD0_2 bit in PD0 register = 0
Bits RXD1SEL1 to RXD1SEL0 in U1SR register = 10b (P6_4)
PD6_4 bit in PD6 register = 0
P0_2 and P6_4 can be used as a port by setting bits RXD1SEL1
to RXD1SEL0 = 00b.
Bits CLK1SEL1 to CLK1SEL0 in U1SR register = 01b (P0_3)
CKDIR bit in U1MR register = 0
Bits CLK1SEL1 to CLK1SEL0 in U1SR register = 10b (P6_2)
CKDIR bit in U1MR register = 0
Bits CLK1SEL1 to CLK1SEL0 in U1SR register = 11b (P6_5)
CKDIR bit in U1MR register = 0
Bits CLK1SEL1 to CLK1SEL0 in U1SR register = 01b (P0_3)
CKDIR bit in U1MR register = 1
PD0_3 bit in PD0 register = 0
Bits CLK1SEL1 to CLK1SEL0 in U1SR register = 10b (P6_2)
CKDIR bit in U1MR register = 1
PD6_2 bit in PD6 register = 0
Bits CLK1SEL1 to CLK1SEL0 in U1SR register = 11b (P6_5)
CKDIR bit in U1MR register = 1
PD6_5 bit in PD6 register = 0
Selection Method
22. Serial Interface (UARTi (i = 0 or 1))