R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 479

MCU 1KB FLASH 32K ROM 48-LQFP

R5F21346CNFP#U0

Manufacturer Part Number
R5F21346CNFP#U0
Description
MCU 1KB FLASH 32K ROM 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/34Cr
Datasheet

Specifications of R5F21346CNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
43
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 446 of 723
Figure 22.4
Figure 22.5
22.3.2
22.3.3
transfer clock polarity.
Figure 22.5 shows the Transfer Format. Use the UFORM bit in the UiC0 (i = 0 to 1) register to select the
transfer format.
Figure 22.4 shows the Transfer Clock Polarity. Use the CKPOL bit in the UiC0 (i = 0 or 1) register to select the
Polarity Select Function
LSB First/MSB First Select Function
Transfer Clock Polarity
Transfer Format
CLKi
CLKi
• CKPOL bit in UiC0 register = 0 (transmit data output at the falling edge and
• CKPOL bit in UiC0 register = 1 (transmit data output at the rising edge and
RXDi
RXDi
TXDi
TXDi
• UFORM bit in UiC0 register = 0 (LSB first)
• UFORM bit in UiC0 register = 1 (MSB first)
receive data input at the rising edge of the transfer clock)
receive data input at the falling edge of the transfer clock)
Notes:
i = 0 or 1
RXDi
RXDi
CLKi
TXDi
CLKi
TXDi
Note:
(1)
(2)
i = 0 or 1
1. The CLKi pin level is high during no transfer.
2. The CLKi pin level is low during no transfer.
1. The above applies when:
CKPOL bit in UiC0 register = 0 (transmit data output at the falling edge and
receive data input at the rising edge of the transfer clock).
D0
D0
D0
D0
D0
D0
D7
D7
D1
D1
D1
D1
D1
D1
D6
D6
D2
D2
D2
D2
D2
D2
D5
D5
D3
D3
D4
D4
D3
D3
D3
D3
(1)
(1)
D4
D4
D3
D3
D4
D4
D4
D4
D5
D5
D2
D2
D5
D5
D5
D5
22. Serial Interface (UARTi (i = 0 or 1))
D6
D6
D1
D1
D6
D6
D6
D6
D7
D7
D0
D0
D7
D7
D7
D7

Related parts for R5F21346CNFP#U0