R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 552

MCU 1KB FLASH 32K ROM 48-LQFP

R5F21346CNFP#U0

Manufacturer Part Number
R5F21346CNFP#U0
Description
MCU 1KB FLASH 32K ROM 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/34Cr
Datasheet

Specifications of R5F21346CNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
43
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 519 of 723
Figure 25.6
Note:
1. Write 0 after reading 1 to set the TEND bit to 0.
(1)
(2)
(3)
SSSR register
SSER register
Sample Flowchart of Data Transmission (Clock Synchronous Communication Mode)
Write transmit data to SSTDR register
Read TDRE bit in SSSR register
Read TEND bit in SSSR register
transmission
Initialization
TDRE = 1 ?
TEND = 1 ?
continues?
Start
Data
End
TEND bit ← 0
TE bit ← 0
Yes
No
Yes
No
Yes
(1)
No
25. Synchronous Serial Communication Unit (SSU)
(2) Determine whether data transmission continues.
(3) When data transmission is completed, the TEND
(1) After reading the SSSR register and confirming
that the TDRE bit is set to 1, write the transmit
data to the SSTDR register. When the transmit
data is written to the SSTDR register, the TDRE
bit is automatically set to 0.
bit is set to 1. Set the TEND bit to 0 and the TE bit
to 0 and complete transmit mode.

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