R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 599

• Manufacturer Part Number: R5F21346CNFP#U0
• Description: MCU 1KB FLASH 32K ROM 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/34Cr

Specifications of R5F21346CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 43
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 566 of 723
26.7
Figure 26.20
The states of pins SCL and SDA are routed through the noise canceller before being latched internally.
Figure 26.20 shows a Noise Canceller Block Diagram.
The noise canceller consists of two cascaded latch and match detector circuits. When the SCL pin input signal (or
SDA pin input signal) is sampled on f1 and two latch outputs match, the level is passed forward to the next circuit.
When they do not match, the former value is retained.
f1 (sampling clock)
Noise Canceller
SCL or SDA
input signal
Noise Canceller Block Diagram
f1 (sampling clock)
f1 period
D
Latch
C
Q
D
Latch
C
Q
detection
Match
circuit
Internal SCL
or SDA signal
26. I
2
C bus Interface