R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 640

MCU 1KB FLASH 32K ROM 48-LQFP

R5F21346CNFP#U0

Manufacturer Part Number
R5F21346CNFP#U0
Description
MCU 1KB FLASH 32K ROM 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/34Cr
Datasheet

Specifications of R5F21346CNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
43
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Company:
Part Number:
R5F21346CNFP#U0
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Part Number:
R5F21346CNFP#U0
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R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 607 of 723
28.10 Notes on A/D Converter
Write to the ADMOD register, the ADINSEL register, the ADCON0 register (other than ADST bit), the
ADCON1 register, the OCVREFCR register when A/D conversion is stopped (before a trigger occurs).
To use the A/D converter in repeat mode 0, repeat mode 1, or repeat sweep mode, select the frequency of the A/D
converter operating clock φ AD or more for the CPU clock during A/D conversion.
Do not select fOCO-F as φ AD.
Connect 0.1 µ F capacitor between the VREF pin and AVSS pin.
Do not enter stop mode during A/D conversion.
Do not enter wait mode during A/D conversion regardless of the state of the CM02 bit in the CM0 register (1:
Peripheral function clock stops in wait mode or 0: Peripheral function clock does not stop in wait mode).
Do not set the FMSTP bit in the FMR0 register to 1 (flash memory stops) or the FMR27 bit to 1 (low-current-
consumption read mode enabled) during A/D conversion. Otherwise, the A/D conversion result will be
undefined.
Do not change the CKS2 bit in the ADMOD register while fOCO-F is stopped.
During an A/D conversion operation, if the ADST bit in the ADCON0 register is set to 0 (A/D conversion stops)
by a program to forcibly terminate A/D conversion, the conversion result of the A/D converter is undefined and
no interrupt is generated. The value of the ADi register before A/D conversion may also be undefined.
If the ADST bit is set to 0 by a program, do not use the value of all the ADi register.
28. A/D Converter

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