R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 655

• Manufacturer Part Number: R5F21346CNFP#U0
• Description: MCU 1KB FLASH 32K ROM 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/34Cr

Specifications of R5F21346CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 43
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 622 of 723
31.4
Table 31.3
Operating mode
Rewrite control program
allocatable area
Rewrite control program
executable areas
Rewritable area
Software command
restrictions
Mode after programming or
block erasure or after
entering erase-suspend
CPU and DTC state during
programming and
block erasure
Flash memory
status detection
Conditions for entering
erase-suspend
CPU clock
In CPU rewrite mode, the user ROM area can be rewritten by executing software commands from the CPU.
Therefore, the user ROM area can be rewritten directly while the MCU is mounted on a board without using a
ROM programmer. Execute the software command only to blocks in the user ROM area.
The flash module has an erase-suspend function which halts the erase operation temporarily during an erase
operation in CPU rewrite mode. During erase-suspend, the flash memory can be read or programmed.
Erase-write 0 mode (EW0 mode) and erase-write 1 mode (EW1 mode) are available in CPU rewrite mode.
Table 31.3 lists the Differences between EW0 Mode and EW1 Mode.
CPU Rewrite Mode
Item
Differences between EW0 Mode and EW1 Mode
Single-chip mode
User ROM
RAM (The rewrite control program must
be transferred before being executed.)
However, the program can be executed
in the program ROM area when rewriting
the data flash area.
User ROM
—
Read array mode
The CPU operates.
Read bits FST7, FMT5, and FMT4 in
the FST register by a program.
• Set bits FMR20 and FMR21 in the
• Set bits FMR20 and FMR22 in the
Max. 20 MHz
FMR2 register to 1 by a program.
FMR2 register to 1 and the enabled
maskable interrupt is generated.
EW0 Mode
Single-chip mode
User ROM
User ROM or RAM
User ROM
Program and block erase commands
Read array mode
• The CPU or DTC operates while the data
• The CPU or DTC is put in a hold state
Read bits FST7, FMT5, and FMT4 in
the FST register by a program.
• Set bits FMR20 and FMR21 in the FMR2
• Set bits FMR20 and FMR22 in the FMR2
Max. 20 MHz
flash area is being programmed or block
erased.
while the program ROM area is being
programmed or block erased. (I/O ports
retain the state before the command
execution).
register to 1 by a program (while rewriting
the data flash area).
register to 1 and the enabled maskable
interrupt is generated.
However, blocks which contain the
rewrite control program are excluded.
Cannot be executed to any block which
contains the rewrite control program.
EW1 Mode
31. Flash Memory