R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 659

• Manufacturer Part Number: R5F21346CNFP#U0
• Description: MCU 1KB FLASH 32K ROM 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/34Cr

Specifications of R5F21346CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 43
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 626 of 723
Figure 31.2
FMSTP Bit (Flash Memory Stop Bit)
CMDRST Bit (Erase/Write Sequence Reset Bit)
CMDERIE Bit (Erase/Write Error Interrupt Enable Bit)
BSYAEIE Bit (Flash Access Error Interrupt Enable Bit)
RDYSTIE Bit (Flash Ready Status Interrupt Enable Bit)
This bit is used to initialize the flash memory control circuits, and also to reduce the amount of current
consumed by the flash memory. Access to the flash memory is disabled by setting the FMSTP bit to 1.
Write to the FMSTP bit by a program transferred to the RAM.
To reduce the power consumption further in high-speed on-chip oscillator mode, low-speed on-chip oscillator
mode (XIN clock stopped), and low-speed clock mode (XIN clock stopped), set the FMSTP bit to 1. Refer to
32.2.10 Stopping Flash Memory for details.
When entering stop mode or wait mode while CPU rewrite mode is disabled, the FMR0 register does not need
to be set because the power for the flash memory is automatically turned off and is turned back on when exiting
stop or wait mode.
When the FMSTP bit is set to 1 (including during the busy status (the period while the FST7 bit is 0)
immediately after the FMSTP bit is changed from 1 to 0), do not set to low-current-consumption read mode at
the same time.
This bit is used to initialize the flash memory sequence and forcibly stop a program or erase command. The
program ROM area can be read when resetting the sequence of programming/erasing the data flash area.
If the program or erase command is forcibly stopped using the CMDRST bit in the FMR0 register, execute the
clear status command after the FST7 bit in the FST register is changed to 1 (ready). To program to the same
address again, execute the block erase command again and ensure it has been completed normally before
programming. If the addresses and blocks which the program or block erase command is forcibly stopped are
allocated in the program area, set the FMR13 bit in the FMR1 register to 1 (lock bit disabled) before executing
the block erasure command again.
When the CMDRST bit is set to 1 (erasure/writing stopped) during erase-suspend, the suspend status is also
initialized. Thus execute block erasure again to the block which the block erasure is being suspended.
When td(CMDRST-READY) has elapsed after the CMDRST bit is set to 1 (erasure/writing stopped), the
executing command is forcibly stopped and reading from the flash memory is enabled.
This bit enables an flash command error interrupt to be generated if the following errors occur:
•
•
•
•
If the CMDERIE bit is set to 1 (erase/write error interrupt enabled), an interrupt is generated if the above errors
occur.
If a flash command error interrupt is generated, execute the clear status register command during interrupt
handling.
This bit enables a flash access error interrupt to be generated if the flash memory during rewriting is accessed.
This bit enables a flash ready status error interrupt to be generated when the status of the flash memory
sequence changes from the busy to ready status.
Program error
Block erase error
Command sequence error
Block blank check error
FMSTP bit
Transition to Low-Current-Consumption Read Mode
FST7 bit
Do not set to low-current-consumption read mode.
0 (busy)
Low-current-consumption
read mode enabled
1 (ready)
31. Flash Memory