R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 664

MCU 1KB FLASH 32K ROM 48-LQFP

R5F21346CNFP#U0

Manufacturer Part Number
R5F21346CNFP#U0
Description
MCU 1KB FLASH 32K ROM 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/34Cr
Datasheet

Specifications of R5F21346CNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
43
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Manufacturer
Quantity
Price
Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
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Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
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R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 631 of 723
31.4.5
31.4.6
When the FMR01 bit in the FMR0 register is set to 1 (CPU rewrite mode enabled), the MCU enters CPU
rewrite mode and software commands can be accepted. At this time, the FMR02 bit in the FMR0 register is set
to 0 so that EW0 mode is selected.
Software commands are used to control program and erase operations. The FST register can be used to confirm
whether programming or erasure has completed.
To enter erase-suspend during auto-erasure, set the FMR20 bit to 1 (erase-suspend enabled) and the FMR21 bit
to 1 (erase-suspend request). Next, verify the FST7 bit in the FST register is set to 1 (ready), then verify the
FST6 bit is set to 1 (during erase-suspend) before accessing the flash memory. When the FST6 bit is set to 0,
erasure completes.
When the FMR21 bit in the FMR2 register is set to 0 (erase restart), auto-erasure restarts. To confirm whether
auto-erasure has restarted, verify the FST7 bit in the FST register is set to 0, then verify the FST6 bit is set to 0
(other than erase-suspend).
After the FMR01 bit in the FMR0 register is set to 1 (CPU rewrite mode enabled), EW1 mode is selected by
setting the FMR02 bit is set to 1.
The FST register can be used to confirm whether programming and erasure has completed.
To enable the erase-suspend function during auto-erasure, execute the block erase command after setting the
FMR20 bit in the FMR2 register to 1 (suspend enabled). To enter erase-suspend while auto-erasing the user
ROM area, set the FMR22 bit in the FMR2 register to 1 (erase-suspend request enabled by interrupt request).
Also, the interrupt to enter erase-suspend must be enabled beforehand.
When an interrupt request is generated, the FMR21 bit in the FMR2 register is automatically set to 1 (erase-
suspend request) and auto-erasure suspends after td(SR-SUS). After interrupt handling completes, set the
FMR21 bit to 0 (erase restart) to restart auto-erasure.
EW0 Mode
EW1 Mode
31. Flash Memory

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