R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 734

• Manufacturer Part Number: R5F21346CNFP#U0
• Description: MCU 1KB FLASH 32K ROM 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/34Cr

Specifications of R5F21346CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 43
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 701 of 723
34.9.5
34.9.6
34.9.7
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Switching procedure
(1) Set the TSTARTi (i = 0 or 1) bit in the TRDSTR register to 0 (count stops).
(2) Change bits TCK2 to TCK0 in the TRDCRi register.
•
Switching procedure
(1) Set the TSTARTi (i = 0 or 1) bit in the TRDSTR register to 0 (count stops).
(2) Change bits TCK2 to TCK0 in the TRDCRi register.
(3) Wait 2 or more cycles of f1.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator stops).
•
Switching procedure
(1) Set the TSTARTi (i = 0 to 1) bit in the TRDSTR register to 0 (count stops).
(2) Change the settings of bits TCK2 to TCK0 in the TRDCRi register.
(3) Wait for a minimum of two cycles of fOCO-F.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator off).
•
Switching procedure
(1) Set the TSTARTi (i = 0 to 1) bit in the TRDSTR register to 0 (count stops).
(2) Change the settings of bits TCK2 to TCK0 in the TRDCRi register.
(3) Wait for a minimum of one cycle of fOCO-F + fOCO40M.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator off).
•
•
•
•
Switching procedure
(1) Set the TSTART0 bit in the TRDSTR register to 0 (count stops).
(2) Set bits CMD1 to CMD0 in the TRDFCR register to 00b (timer mode, PWM mode, and PWM3 mode).
(3) Set bits CMD1 to CMD0 to 01b (reset synchronous PWM mode).
(4) Set the other registers associated with timer RD again.
Switch the count source after the count stops.
When changing the count source from fOCO40M to another source and stopping fOCO40M, wait 2 cycles of
f1 or more after setting the clock switch, and then stop fOCO40M.
After switching the count source from fOCO-F to fOCO40M, allow a minimum of two cycles of fOCO-F to
elapse after changing the clock setting before stopping fOCO-F.
After switching the count source from fOCO-F to a clock other than fOCO40M, allow a minimum of one
cycle of fOCO-F + fOCO40M to elapse after changing the clock setting before stopping fOCO-F.
Set the pulse width of the input capture signal to 3 or more cycles of the timer RD operation clock (refer to
Table 20.1 Timer RD Operation Clocks).
The value in the TRDi register is transferred to the TRDGRji register 2 to 3 cycles of the timer RD operation
clock after the input capture signal is applied to the TRDIOji pin (i = 0 or 1, j = A, B, C, or D) (no digital
filter).
When reset synchronous PWM mode is used for motor control, make sure OLS0 = OLS1.
Set to reset synchronous PWM mode by the following procedure:
Count Source Switch
Input Capture Function
Reset Synchronous PWM Mode
34. Usage Notes