R5F21275SNFP#U0 Renesas Electronics America, R5F21275SNFP#U0 Datasheet - Page 240

IC R8C/27 MCU FLASH 32LQFP

R5F21275SNFP#U0

Manufacturer Part Number
R5F21275SNFP#U0
Description
IC R8C/27 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/27r
Datasheet

Specifications of R5F21275SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 14.60
14.3.8
Table 14.24
Timer RC Status Register
Timer RC generates a timer RC interrupt request from five sources. The timer RC interrupt uses the single
TRCIC register (bits IR and ILVL0 to ILVL2) and a single vector.
Table 14.24 lists the Registers Associated with Timer RC Interrupt, and Figure 14.60 shows a Block Diagram of
Timer RC Interrupt.
Like other maskable interrupts, the timer RC interrupt is controlled by the combination of the I flag, IR bit, bits
ILVL0 to ILVL2, and IPL. However, it differs from other maskable interrupts in the following respects because
a single interrupt source (timer RC interrupt) is generated from multiple interrupt request sources.
Refer to Figure 14.29 TRCIER Register, for details of the TRCIER register.
Refer to 12.1.6 Interrupt Control, for details of the TRCIC register and 12.1.5.2 Relocatable Vector Tables,
for information on interrupt vectors.
• The IR bit in the TRCIC register is set to 1 (interrupt requested) when a bit in the TRCSR register is set to
• The IR bit is set to 0 (no interrupt request) when the bit in the TRCSR register or the corresponding bit in
• If after the IR bit is set to 1 another interrupt source is triggered, the IR bit remains set to 1 and does not
• If multiple bits in the TRCIER register are set to 1, use the TRCSR register to determine the source of the
• The bits in the TRCSR register are not automatically set to 0 when an interrupt is acknowledged. Set them
Sep 26, 2008
1 and the corresponding bit in the TRCIER register is also set to 1 (interrupt enabled).
the TRCIER register is set to 0, or both are set to 0. In other words, the interrupt request is not maintained
if the IR bit is once set to 1 but the interrupt is not acknowledged.
change.
interrupt request.
to 0 within the interrupt routine. Refer to Figure 14.30 TRCSR Register, for the procedure for setting
these bits to 0.
TRCSR
Timer RC Interrupt
Registers Associated with Timer RC Interrupt
Block Diagram of Timer RC Interrupt
IMFA, IMFB, IMFC, IMFD, OVF: Bits in TRCSR register
IMIEA, IMIEB, IMIEC, IMIED, OVIE: Bits in TRCIER register
Page 221 of 453
IMIEC bit
IMIED bit
IMIEA bit
IMIEB bit
IMFC bit
IMFD bit
IMFA bit
IMFB bit
OVIE bit
OVF bit
Timer RC Interrupt Enable Register
TRCIER
Timer RC Interrupt Control Register
Timer RC interrupt request
(IR bit in TRCIC register)
TRCIC
14. Timers

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