R5F21274SDFP#U0 Renesas Electronics America, R5F21274SDFP#U0 Datasheet - Page 119

IC R8C/27 MCU FLASH 32LQFP

R5F21274SDFP#U0

Manufacturer Part Number
R5F21274SDFP#U0
Description
IC R8C/27 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/27r
Datasheet

Specifications of R5F21274SDFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
10.5.3
Table 10.4
NOTE:
Key input interrupt
INT0, INT1, INT3 interrupt
Timer RA interrupt
Serial interface interrupt
Voltage monitor 1 interrupt
Voltage monitor 2 interrupt
10.5.3.1
10.5.3.2
1. For N, D version only.
Since the oscillator circuits stop in stop mode, the CPU clock and peripheral function clock stop and the CPU
and peripheral functions that use these clocks stop operating. The least power required to operate the MCU is in
stop mode. If the voltage applied to the VCC pin is VRAM or more, the contents of internal RAM is
maintained.
The peripheral functions clocked by external signals continue operating.
Table 10.4 lists Interrupts to Exit Stop Mode and Usage Conditions.
The MCU enters stop mode when the CM10 bit in the CM1 register is set to 1 (all clocks stop). At the same
time, the CM06 bit in the CM0 register is set to 1 (divide-by-8 mode), the CM03 bit in the CM0 register is set to
1 (XCIN clock oscillator circuit drive capacity high), and the CM15 bit in the CM1 register is set to 1 (XIN
clock oscillator circuit drive capacity high).
When using stop mode, set bits OCD1 to OCD0 to 00b before entering stop mode.
The status before wait mode was entered is maintained.
However, when the CM01 bit in the CM0 register is set to 0 (XIN clock) and the CM13 bit in the CM1 register
is set to 1 (XIN-XOUT pins), the XOUT(P4_7) pin is held “H”. When the CM13 bit is set to 0 (input ports P4_6
and P4_7), the P4_7(XOUT pin) is held in input status.
When the CM01 bit in the CM0 register is set to 1 (XCIN clock) and the CM04 bit in the CM0 register is set to
1 (XCIN clock oscillates), the XCOUT(P4_7) pin is held “H”. When the CM04 bit is set to 0 (XIN clock stops),
the P4_7(XOUT pin) is held in input status.
Sep 26, 2008
Stop Mode
Interrupt
Entering Stop Mode
Pin Status in Stop Mode
Interrupts to Exit Stop Mode and Usage Conditions
Page 100 of 453
(1)
Usable in digital filter disabled mode (VW2C1 bit in VW2C register is set
Can be used if there is no filter
When there is no filter and external pulse is counted in event counter
mode
When external clock is selected
Usable in digital filter disabled mode (VW1C1 bit in VW1C register is set
to 1)
to 1)
Usage Conditions
10. Clock Generation Circuit

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