MC9S08GT60CFD Freescale Semiconductor, MC9S08GT60CFD Datasheet - Page 141

• Manufacturer Part Number: MC9S08GT60CFD
• Description: MCU 8BIT 60K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08GT60CFD

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Freescale Semiconductor
PULA
PULH
PULX
ROL opr8a
ROLA
ROLX
ROL oprx8,X
ROL ,X
ROL oprx8,SP
ROR opr8a
RORA
RORX
ROR oprx8,X
ROR ,X
ROR oprx8,SP
RSP
RTI
RTS
SBC #opr8i
SBC opr8a
SBC opr16a
SBC oprx16,X
SBC oprx8,X
SBC ,X
SBC oprx16,SP
SBC oprx8,SP
SEC
SEI
STA opr8a
STA opr16a
STA oprx16,X
STA oprx8,X
STA ,X
STA oprx16,SP
STA oprx8,SP
STHX opr8a
STHX opr16a
STHX oprx8,SP
STOP
STX opr8a
STX opr16a
STX oprx16,X
STX oprx8,X
STX ,X
STX oprx16,SP
STX oprx8,SP
Source
Form
Pull Accumulator from
Stack
Pull H (Index Register
High) from Stack
Pull X (Index Register
Low) from Stack
Rotate Left through Carry
Rotate Right through
Carry
Reset Stack Pointer
Return from Interrupt
Return from Subroutine
Subtract with Carry
Set Carry Bit
Set Interrupt Mask Bit
Store Accumulator in
Memory
Store H:X (Index Reg.)
Enable Interrupts:
Stop Processing
Refer to MCU
Documentation
Store X (Low 8 Bits of
Index Register)
in Memory
Operation
Table 8-1. HCS08 Instruction Set Summary (Sheet 6 of 7)
MC9S08GB/GT Data Sheet, Rev. 2.3
SP ← (SP) + $0001; Pull (CCR)
SP ← (SP) + $0001; Pull (PCH)
SP ← (SP) + $0001; Pull (PCL)
SP ← SP + $0001; Pull (PCH)
SP ← SP + $0001; Pull (PCL)
SP ← (SP) + $0001; Pull (A)
SP ← (SP) + $0001; Pull (X)
SP ← (SP + $0001); Pull (A)
SP ← (SP + $0001); Pull (H)
SP ← (SP + $0001); Pull (X)
I bit ← 0; Stop Processing
(High Byte Not Affected)
(M:M + $0001) ← (H:X)
C
b7
A ← (A) – (M) – (C)
Description
b7
SP ← $FF
M ← (A)
M ← (X)
C ← 1
I ← 1
b0
b0
C
V H I N Z C
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – 1 INH
– – 1 – – – INH
0 – –
0 – –
– – 0 – – – INH
0 – –
– –
– –
– –
on CCR
Effect
–
–
–
HCS08 Instruction Set Summary
DIR
INH
INH
IX1
IX
SP1
DIR
INH
INH
IX1
IX
SP1
INH
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
DIR
EXT
IX2
IX1
IX
SP2
SP1
DIR
EXT
SP1
DIR
EXT
IX2
IX1
IX
SP2
SP1
9EDF
9ED2
9EE2
9ED7
9EE7
9EFF
9EEF
9E69
9E66
CF
DF
9C
C2
D2
C7
D7
BF
EF
8A
A2
B2
E2
9B
B7
E7
8E
FF
86
88
39
49
59
69
79
36
46
56
66
76
80
81
F2
99
F7
35
96
dd
ff
ff
dd
ff
ff
ii
dd
hh ll
ee ff
ff
ee ff
ff
dd
hh ll
ee ff
ff
ee ff
ff
dd
hh ll
ff
dd
hh ll
ee ff
ff
ee ff
ff
2+
3
3
3
5
1
1
5
4
6
5
1
1
5
4
6
1
9
6
2
3
4
4
3
3
5
4
1
1
3
4
4
3
2
5
4
4
5
5
3
4
4
3
2
5
4
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