MC9S08GT60CFD Freescale Semiconductor, MC9S08GT60CFD Datasheet - Page 31

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MC9S08GT60CFD

Manufacturer Part Number
MC9S08GT60CFD
Description
MCU 8BIT 60K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08GT60CFD

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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as the IRQ input and is set to detect rising edges, the pullup enable control bit enables a pulldown device
rather than a pullup device.
2.3.6
Table 2-2
common pin interfaces are hardwired to internal circuits.
Freescale Semiconductor
PTA0/KBI1P0
PTA1/KBI1P1
PTA2/KBI1P2
PTA3/KBI1P3
PTA4/KBI1P4
PTA5/KBI1P5
PTA6/KBI1P6
PTA7/KBI1P7
PTB0/AD1P0
PTB1/AD1P1
PTB2/AD1P2
PTB3/AD1P3
PTB4/AD1P4
PTB5/AD1P5
PTB6/AD1P6
PTB7/AD1P7
PTC1/RxD2
PTC2/SDA1
PTC3/SCL1
PTC0/TxD2
RESET
V
V
V
Name
V
V
IRQ
V
Pin
DDAD
SSAD
REFH
REFL
DD
SS
summarizes I/O pin characteristics. These characteristics are determined by the way the
Signal Properties Summary
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
High Current
Pin
Y
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
Y
Y
Y
Y
MC9S08GB/GT Data Sheet, Rev. 2.3
Table 2-2. Signal Properties
Output
Slew
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
N
1
Pull-Up
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
Y
Y
2
The 48-pin QFN package has two V
and V
Pin contains integrated pullup.
IRQPE must be set to enable IRQ function.
IRQ does not have a clamp diode to V
not be driven above V
Pullup/pulldown active when IRQ pin function
enabled. Pullup forced on when IRQ enabled for
falling edges; pulldown forced on when IRQ enabled
for rising edges.
Pullup/pulldown active when KBI pin function
enabled. Pullup forced on when KBI1Px enabled for
falling edges; pulldown forced on when KBI1Px
enabled for rising edges.
When pin is configured for SCI function, pin is
configured for partial output drive.
SS2
.
Recommended System Connections
Comments
DD
.
SS
DD
pins — V
. IRQ should
SS1
31

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