C8051F018-GQR Silicon Laboratories Inc, C8051F018-GQR Datasheet - Page 112

• Manufacturer Part Number: C8051F018-GQR
• Description: IC 8051 MCU 16K FLASH 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F018r

Specifications of C8051F018-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F005DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Bits7-0: SCR7-SCR0: SPI Clock Rate
Bits7-0: SPI0DAT: SPI0 Transmit and Receive Data.
SCR7
R/W
R/W
Bit7
Bit7
These bits determine the frequency of the SCK output when the SPI module is
configured for master mode operation. The SCK clock frequency is a divided down
version of the system clock, and is given in the following equations:
f
The SPI0DAT register is used to transmit and receive SPI data. Writing data to SPI0DAT
places the data immediately into the shift register and initiates a transfer when in Master
Mode. A read of SPI0DAT returns the contents of the receive buffer.
SCK
= 0.5 * f
SCR6
R/W
R/W
Bit6
Bit6
SYSCLK
SCR5
R/W
R/W
Bit5
Bit5
Figure 15.7. SPI0CKR: SPI Clock Rate Register
/ (SPI0CKR + 1),
Figure 15.8. SPI0DAT: SPI Data Register
SCR4
R/W
R/W
Bit4
Bit4
Rev. 1.2
SCR3
R/W
R/W
Bit3
Bit3
for 0  SPI0CKR  255,
SCR2
R/W
R/W
Bit2
Bit2
SCR1
R/W
R/W
Bit1
Bit1
C8051F018
C8051F019
SCR0
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
Reset Value
Reset Value
00000000
00000000
0x9D
0x9B
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