C8051F018-GQR Silicon Laboratories Inc, C8051F018-GQR Datasheet - Page 137

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C8051F018-GQR

Manufacturer Part Number
C8051F018-GQR
Description
IC 8051 MCU 16K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F018r
Datasheets

Specifications of C8051F018-GQR

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
2.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F005DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F018-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
18. PROGRAMMABLE COUNTER ARRAY
The Programmable Counter Array (PCA) provides enhanced timer functionality while requiring less CPU
intervention than the standard 8051 counter/timers. The PCA consists of a dedicated 16-bit counter/timer and five
16-bit capture/compare modules. Each capture/compare module has its own associated I/O line (CEXn) which is
routed through the Crossbar to Port I/O when enabled (see Section 13.1 for details on configuring the Crossbar).
The counter/timer is driven by a configurable timebase that can select between four inputs as its source: system
clock divided by twelve, system clock divided by four, Timer 0 overflow, or an external clock signal on the ECI
line. The PCA is configured and controlled through the system controller’s Special Function Registers. The basic
PCA block diagram is shown in Figure 18.1.
137
C8051F018
C8051F019
T0 Overflow
System
Clock
Capture/Compare
Module 0
/12
/4
CPS=11
10
01
Capture/Compare
00
Figure 18.1. PCA Block Diagram
Module 1
Crossbar
16-Bit Counter/Timer
Rev. 1.2
Port I/O
Capture/Compare
Module 2
Capture/Compare
Module 3
Capture/Compare
Module 4

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