C8051F018-GQR Silicon Laboratories Inc, C8051F018-GQR Datasheet - Page 3

• Manufacturer Part Number: C8051F018-GQR
• Description: IC 8051 MCU 16K FLASH 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F018r

Specifications of C8051F018-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F005DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

7.
8.
9.
10. EXTERNAL RAM .............................................................................................................. 74
11. RESET SOURCES .............................................................................................................. 75
3
C8051F018
C8051F019
Figure 6.3. CPT0CN: Comparator 0 Control Register ......................................................................................39
Figure 6.4. CPT1CN: Comparator 1 Control Register ......................................................................................40
Table 6.1. Comparator Electrical Characteristics ..............................................................................................41
VOLTAGE REFERENCE ................................................................................................. 42
Figure 7.1. Voltage Reference Functional Block Diagram ...............................................................................42
Figure 7.2. REF0CN: Reference Control Register ............................................................................................43
Table 7.1. Reference Electrical Characteristics .................................................................................................43
CIP-51 CPU.......................................................................................................................... 44
Figure 8.1. CIP-51 Block Diagram....................................................................................................................44
8.1. INSTRUCTION SET ..................................................................................................................................45
Table 8.1. CIP-51 Instruction Set Summary......................................................................................................46
8.2. MEMORY ORGANIZATION....................................................................................................................49
Figure 8.2. Memory Map...................................................................................................................................51
8.3. SPECIAL FUNCTION REGISTERS..........................................................................................................52
Table 8.2. Special Function Register Memory Map ..........................................................................................52
Table 8.3. Special Function Registers ...............................................................................................................52
Figure 8.3. SP: Stack Pointer.............................................................................................................................56
Figure 8.4. DPL: Data Pointer Low Byte ..........................................................................................................56
Figure 8.5. DPH: Data Pointer High Byte .........................................................................................................56
Figure 8.6. PSW: Program Status Word............................................................................................................57
Figure 8.7. ACC: Accumulator..........................................................................................................................58
Figure 8.8. B: B Register ...................................................................................................................................58
8.4. INTERRUPT HANDLER ...........................................................................................................................59
Table 8.4. Interrupt Summary............................................................................................................................60
Figure 8.9. IE: Interrupt Enable.........................................................................................................................61
Figure 8.10. IP: Interrupt Priority......................................................................................................................62
Figure 8.11. EIE1: Extended Interrupt Enable 1 ...............................................................................................63
Figure 8.12. EIE2: Extended Interrupt Enable 2 ...............................................................................................64
Figure 8.13. EIP1: Extended Interrupt Priority 1 ..............................................................................................65
Figure 8.14. EIP2: Extended Interrupt Priority 2 ..............................................................................................66
8.5. Power Management Modes .........................................................................................................................67
Figure 8.15. PCON: Power Control Register ....................................................................................................68
FLASH MEMORY.............................................................................................................. 69
9.1. Programming The Flash Memory................................................................................................................69
Table 9.1. FLASH Memory Electrical Characteristics ......................................................................................69
9.2. Non-volatile Data Storage ...........................................................................................................................70
9.3. Security Options ..........................................................................................................................................70
Figure 9.1. PSCTL: Program Store RW Control...............................................................................................70
Figure 9.2. Flash Program Memory Security Bytes ...........................................................................................71
Figure 9.3. FLACL: Flash Access Limit ...........................................................................................................72
Figure 9.4. FLSCL: Flash Memory Timing Prescaler .......................................................................................73
Figure 10.1. EMI0CN: External Memory Interface Control .............................................................................74
Figure 11.1. Reset Sources Diagram .................................................................................................................75
11.1. Power-on Reset........................................................................................................................................76
11.2. Software Forced Reset.............................................................................................................................76
Figure 11.2. VDD Monitor Timing Diagram ....................................................................................................76
11.3. Power-fail Reset ......................................................................................................................................76
11.4. External Reset..........................................................................................................................................77
11.5. Missing Clock Detector Reset .................................................................................................................77
11.6. Comparator 0 Reset .................................................................................................................................77
11.7. External CNVSTR Pin Reset...................................................................................................................77
11.8. Watchdog Timer Reset ............................................................................................................................77
Rev. 1.2