C8051F018-GQR Silicon Laboratories Inc, C8051F018-GQR Datasheet - Page 51

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C8051F018-GQR

Manufacturer Part Number
C8051F018-GQR
Description
IC 8051 MCU 16K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F018r
Datasheets

Specifications of C8051F018-GQR

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
2.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F005DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F018-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
8.2.5.
A programmer’s stack can be located anywhere in the 256-byte data memory. The stack area is designated using
the Stack Pointer (SP, 0x81) SFR. The SP will point to the last location used. The next value pushed on the stack is
placed at SP+1 and then SP is incremented. A reset initializes the stack pointer to location 0x07. Therefore, the
first value pushed on the stack is placed at location 0x08, which is also the first register (R0) of register bank 1.
Thus, if more than one register bank is to be used, the SP should be initialized to a location in the data memory not
being used for data storage. The stack depth can extend up to 256 bytes.
The MCUs also have built-in hardware for a stack record. The stack record is a 32-bit shift register, where each
Push or increment SP pushes one record bit onto the register, and each Call or interrupt pushes two record bits onto
the register. (A Pop or decrement SP pops one record bit, and a Return pops two record bits, also.) The stack
record circuitry can also detect an overflow or underflow on the Stack, and can notify the debug software even with
the MCU running full-speed debug.
51
0x3DFF
0x7FFF
0x3E00
0x807F
0x8000
0x0000
C8051F018
C8051F019
Stack
PROGRAM MEMORY
Programmable in 512
Programmable)
Byte Sectors)
RESERVED
(In-System
(In-System
FLASH
FLASH
0xFFFF
0xFC00
0x0BFF
0x07FF
0x03FF
0x0800
0x0400
0x0000
Figure 8.2. Memory Map
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
(same 1024 byte RAM block )
(same 1024 byte RAM block )
(same 1024 byte RAM block )
Rev. 1.2
RAM - 1024 Bytes
(accessable using MOVX
(Indirect Addressing
(Direct and Indirect
EXTERNAL DATA ADDRESS SPACE
General Purpose
INTERNAL DATA ADDRESS SPACE
Upper 128 RAM
Bit Addressable
Addressing)
Registers
command)
Only)
DATA MEMORY
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's
The same 1024 byte RAM
block can be addressed on
1k boundaries throughout
the 64k External Data
Memory space.

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