MC68HC711D3CFNE3 Freescale Semiconductor, MC68HC711D3CFNE3 Datasheet - Page 101

IC MCU 8BIT 2MHZ 44-PLCC

MC68HC711D3CFNE3

Manufacturer Part Number
MC68HC711D3CFNE3
Description
IC MCU 8BIT 2MHZ 44-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711D3CFNE3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
26
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC711D3CFNE3
Manufacturer:
SGS
Quantity:
6 218
Part Number:
MC68HC711D3CFNE3
Manufacturer:
FREESCALE
Quantity:
1 490
Part Number:
MC68HC711D3CFNE3
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
RTR[1:0] — RTI Interrupt Rate Select
9.5 Computer Operating Properly Watchdog Function
9.6 Pulse Accumulator
TECHNICAL DATA
These two bits determine the rate at which the RTI system requests interrupts. The
RTI system is driven by an E divided by 2
dependent of the timer prescaler. These two control bits select an additional division
factor.
The clocking chain for the COP function, tapped off of the main timer divider chain, is
only superficially related to the main timer system. The CR[1:0] bits in the OPTION
register and the NOCOP bit in the CONFIG register determine the status of the COP
function. Refer to SECTION 5 RESETS AND INTERRUPTS for a more detailed dis-
cussion of the COP function.
The MC68HC11D3 has an 8-bit counter that can be configured to operate either as a
simple event counter, or for gated time accumulation, depending on the state of the
PAMOD bit in the PACTL register. Refer to the pulse accumulator block diagram, Fig-
ure 9-3.
In the event counting mode, the 8-bit counter is clocked to increasing values by an ex-
ternal pin. The maximum clocking rate for the external event counting mode is the E
clock divided by two. In gated time accumulation mode, a free-running E-clock
signal drives the 8-bit counter, but only while the external PAI pin is activated. Refer to
Table 9-3. The pulse accumulator counter can be read or written at any time.
RTR[1:0]
0 0
0 1
1 0
1 1
E = 1 MHz
10.923 ms
21.845 ms
Freescale Semiconductor, Inc.
2.731 ms
5.461 ms
For More Information On This Product,
Go to: www.freescale.com
TIMING SYSTEM
E = 2 MHz
16.384 ms
32.768 ms
4.096 ms
8.192 ms
13
rate clock that is compensated so it is in-
E = 3 MHz
16.384 ms
32.768 ms
65.536 ms
8.192 ms
E = X MHz
(E/2
(E/2
(E/2
(E/2
13
14
15
16
)
)
)
)
9-15
64

Related parts for MC68HC711D3CFNE3