MC68HC705C9ACFBE Freescale Semiconductor, MC68HC705C9ACFBE Datasheet - Page 41

• Manufacturer Part Number: MC68HC705C9ACFBE
• Description: IC MCU 8BIT 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705C9ACFBE

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 352 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Processor Series: HC705C
• Core: HC05
• Data Bus Width: 8 bit
• Data Ram Size: 352 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2.1 MHz
• Number Of Programmable I/os: 31
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Package: 44PQFP
• Family Name: HC05
• Maximum Speed: 2.1 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

5.5 MC68HC05C9A Compatible COP
This COP is controlled with two registers; one to reset the COP timer and the other to enable and control
COP and clock monitor functions.
5.5.1 C9A COP Reset Register
This write-only register, shown in
The sequence required to reset the COP timer is:
Both write operations must occur in the order listed, but any number of instructions may be executed
between the two write operations provided that the COP does not time out between the two writes. The
elapsed time between software resets must not be greater than the COP timeout period. If the COP
should time out, a system reset will occur and the device will be re-initialized in the same fashion as a
power-on reset or reset.
Reading this register does not return valid data.
5.5.2 C9A COP Control Register
The COP control register, shown in
and flags the following conditions:
Freescale Semiconductor
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INTERNAL
CLOCK
Write $55 to the COP reset register
Write $AA to the COP reset register
Enables clock monitor function
Enables MC68HC05C9A compatible COP function
Selects timeout duration of COP timer
A COP timeout
Clock monitor reset
CPU
$001D
Reset:
Read:
Write:
÷4
16 BIT TIMER SYSTEM
÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2
Bit 7
Bit 7
0
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
COPRST
= Unimplemented
Figure 5-4. COP Reset Register (COPRST)
Figure 5-3. C9A COP Block Diagram
Bit 6
6
0
Figure
Figure 5-3
Figure
Bit 5
5-4, is used to reset the COP.
5
0
5-5, performs these functions:
shows a block diagram of the MC68HC05C9A COP.
÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2
2
13
Bit 4
4
0
÷4
÷2
Bit 3
3
0
÷2
Bit 2
÷2
2
0
÷2
CM0
CM1
MC68HC05C9A Compatible COP
Bit 1
1
0
÷2
÷2
2
2
2
2
Bit 0
Bit 0
15
17
19
21
0
COP
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