MC68HC705C9ACFBE Freescale Semiconductor, MC68HC705C9ACFBE Datasheet - Page 65

• Manufacturer Part Number: MC68HC705C9ACFBE
• Description: IC MCU 8BIT 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705C9ACFBE

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 352 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Processor Series: HC705C
• Core: HC05
• Data Bus Width: 8 bit
• Data Ram Size: 352 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2.1 MHz
• Number Of Programmable I/os: 31
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Package: 44PQFP
• Family Name: HC05
• Maximum Speed: 2.1 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

9.12 Transmit Data Out (TDO)
Transmit data is the serial data from the internal data bus that is applied through the SCI to the output
line. Data format is as discussed in
a bit time by using a derivative of the RT clock, thus producing a transmission rate equal to 1/16th that of
the receiver sample clock.
9.13 SCI I/O Registers
The following I/O registers control and monitor SCI operation:
9.13.1 SCI Data Register
The SCI data register (SCDR), shown in
characters transmitted.
9.13.2 SCI Control Register 1
The SCI control register 1 (SCCR1), shown in
R8 — Bit 8 (Received)
Freescale Semiconductor
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When the SCI is receiving 9-bit characters, R8 is the ninth bit of the received character. R8 receives
the ninth bit at the same time that the SCDR receives the other eight bits. Resets have no effect on the
R8 bit.
SCI data register (SCDR)
SCI control register 1 (SCCR1)
SCI control register 2 (SCCR2)
SCI status register (SCSR)
Stores ninth SCI data bit received and ninth SCI data bit transmitted
Controls SCI character length
Controls SCI wakeup method
Reset:
$000E
Reset:
$0011
Read:
Read:
Write:
Write:
BIT7
Bit 7
Bit 7
R8
U
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
Figure 9-9. SCI Control Register 1 (SCCR1)
= Unimplemented
Figure 9-8. SCI Data Register (SCDR)
BIT6
T8
U
6
6
9.6 Data Format
Figure
BIT55
5
5
0
Figure
9-8, is the buffer for characters received and for
U = Undetermined
Unaffected by reset
BIT4
M
U
4
4
and shown in
9-9, has these functions:
WAKE
BIT3
U
3
3
Figure
BIT2
2
2
0
9-3. The transmitter generates
BIT1
1
1
0
Transmit Data Out (TDO)
Bit 0
BIT0
Bit 0
0
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